Semiconductor structure forming method

A semiconductor and plasma technology, used in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems affecting the performance of fin field effect transistors, blocking ion implantation, and affecting the effect of lightly doped ion implantation.

Inactive Publication Date: 2015-11-25
SEMICON MFG INT (SHANGHAI) CORP
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Problems solved by technology

Since the sidewall material layer also covers the sidewall surface of the fin, it is difficult to remove the sidewall material layer located on the sidewall surface of the fin in the existing process, resulting in the surface of the fin being partially covered by the sidewall material layer. When lightly doped ion implantation is performed on the fins on both sides of the gate structure, the remaining sidewall material layer will block the ion implantation, affecting the effect of the lightly doped ion implantation, thereby affecting the formed fin field effect transistor. performance

Method used

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Embodiment Construction

[0030] As mentioned in the background technology, when forming the sidewall on the sidewall surface of the gate structure of the fin field effect transistor, the sidewall material layer on the sidewall surface of the fin is difficult to remove, which will cover the surface of the fin and affect the thickness Ion implantation is performed on the fin, thereby affecting the performance of the formed fin field effect transistor.

[0031] One embodiment of the present invention provides a method of removing a layer of sidewall material on a sidewall of a fin.

[0032] Please refer to figure 1 , forming several fins 10 arranged in parallel on the semiconductor substrate; forming an isolation layer on the surface of the semiconductor substrate, the surface of the isolation layer is lower than the top surface of the fins 10; forming a gate across the fins electrode 20, the top of the gate has a mask layer. figure 1 It is a schematic plan view after omitting the semiconductor subst...

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Abstract

The invention discloses a semiconductor structure forming method. The method comprises the following steps of providing a semiconductor substrate; forming a fin part on the semiconductor substrate surface; forming an isolating layer on the surface of the semiconductor substrate; forming a gate dielectric layer on the surfaces of the fin part and the isolating layer; forming a gate electrode stretching across the fin part on a part of the gate dielectric layer surface; forming a side wall material layer on the gate dielectric layer and the gate electrode surface; performing first-angle plasma etching on the side wall material layer to remove the side wall material layer on the side wall located on one side of the fin part; performing second-angle plasma etching on the side wall material layer to remove the side wall material layer on the side wall located on the other side of the fin part and the remaining side wall material layer on the gate dielectric layer; and forming a side wall located on the gate electrode side wall surface. By means of the above-mentioned method, the side wall is formed on the gate electrode side wall while the side wall material layer on the fin part side wall surface is removed. The performance of a formed fin type field effect transistor is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for forming a semiconductor structure. Background technique [0002] With the continuous development and progress of semiconductor technology, the integration level of integrated circuits is getting higher and higher, and the size of transistors is getting smaller and smaller. When the size of the transistor shrinks, the length of the gate will also become shorter, which will easily lead to adverse effects such as the short channel effect of the transistor, and affect the performance of the transistor. [0003] In the planar MOS transistors in the prior art, after the gate structure is formed, sidewalls can be formed on the surface of the sidewalls of the gate structure, and lightly doped in the semiconductor substrate on both sides of the gate structure using the sidewalls as a mask Ion implantation to form a lightly doped region and improve the short channel ef...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336
Inventor 毛刚俞少峰陈林林杨正睿虞肖鹏
Owner SEMICON MFG INT (SHANGHAI) CORP
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