Formation method of semiconductor structure

Abstract

The invention provides a formation method of a semiconductor structure. The formation method of a semiconductor structure comprises the steps: providing a semiconductor substrate, etching the semiconductor substrate to form fin parts; forming a dielectric layer on the fin parts and the semiconductor substrate between the fin parts; and taking the gas containing hydrogen fluoride and ammonia gas as the etching gas, and when no plasma is generated, performing first etching on the dielectric layer until the surface of the dielectric layer is lower than the top of the fin parts. For the formation method of a semiconductor structure, as the gas containing hydrogen fluoride and ammonia gas as the etching gas is used to etch the dielectric layer when no plasma is generated, generation of the plasma gas containing fluorinion can be avoided during the etching process so that the exposed fin parts can be lowered to prevent from etching by the fluorinion and to reduce the damage on the fin parts during the process for etching the dielectric layer and then the structural form of the subsequently formed fin parts can be improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a semiconductor structure. Background technique [0002] With the rapid development of integrated circuit (abbreviated as IC) manufacturing technology, the size of semiconductor elements in the integrated circuit is correspondingly reduced. [0003] However, the reduction in size puts forward higher requirements on the performance of semiconductor components. For example, MOS transistors generate switching signals by applying voltage to the gate to adjust the current passing through the channel region. However, as the size of semiconductor components decreases, Small, the control ability of the traditional planar MOS transistor on the channel current becomes weak, which is easy to cause serious leakage current. [0004] In order to improve the gate control capability of MOS transistors, multi-gate devices have been developed in the prior ...

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Problems solved by technology

[0011] However, with the development of semiconductor devices, the size of semiconductor devices continues to decrease, and the performance of Fin FETs obtained through the above-mentioned Fin FET manufacturing process is poor, which cannot meet the needs of semiconductor device development.

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