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Formation method of semiconductor structure

A semiconductor and gas technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of holes and low density, and achieve the effect of improving density and preventing holes

Active Publication Date: 2016-06-29
SEMICON MFG INT (SHANGHAI) CORP
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  • Description
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  • Application Information

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Problems solved by technology

[0009] However, the existing shallow trench isolation structure has the problems of low density and holes

Method used

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  • Formation method of semiconductor structure
  • Formation method of semiconductor structure

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Embodiment Construction

[0029] As mentioned in the background art, the shallow trench isolation structure formed in the prior art has the problems of low density and holes.

[0030] The study found that the middle area of ​​the isolation material layer formed by the high aspect ratio deposition process has low density, so the middle area of ​​the shallow trench isolation structure formed by the chemical mechanical polishing process on the isolation material layer is prone to holes or depressions, which affects the Electrical isolation performance of shallow trench isolation structures.

[0031] Further research found that the gas used in the high aspect ratio deposition process is TEOS (tetraethoxysilane, Si(OC 2 h 5 ) 4 ) and O 3 , when forming the isolation material layer, the reaction chamber maintains a certain chamber pressure and temperature, and TEOS and O 3 into the reaction chamber, TEOS and O 3 The reaction forms a silicon oxide isolation material layer. The isolation material layer is...

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Abstract

A method for forming a semiconductor structure, comprising: providing a semiconductor substrate formed with several grooves; forming a first silicon oxide layer on the side walls and bottom surfaces of the grooves and the surface of the semiconductor substrate, and the surface of the first silicon oxide layer Part of the silicon atoms in the silicon oxide layer are connected to the ethoxy group; an inert plasma treatment process is performed to break the bond between the ethyl group and the oxygen atom in the ethoxy group on the surface of the first silicon oxide layer to form a silicon-oxygen dangling bond; perform water vapor treatment process, the oxygen in the silicon-oxygen dangling bond on the surface of the first silicon oxide layer is combined with hydrogen to form a silicon-oxygen-hydrogen bond; an ultraviolet treatment process is performed to remove the hydrogen element in the silicon-oxygen-hydrogen bond on the surface of the first silicon oxide layer to form Silicon-oxygen-silicon bond; perform a second high aspect ratio deposition process to form a second silicon oxide layer on the surface of the first silicon oxide layer; remove the first silicon oxide layer and the second silicon oxide layer on the semiconductor substrate, and place in the trench A shallow trench isolation structure is formed. The compactness of the shallow trench isolation structure of the present invention is increased.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for forming a semiconductor structure. Background technique [0002] The development direction of semiconductor integrated circuits is to increase density and shrink components. In the manufacture of integrated circuits, the isolation structure is an important technology, and the components formed on the silicon substrate use the isolation structure to isolate each other. With the advancement of semiconductor manufacturing technology, shallow trench isolation (Shallow Trench Isolation, STI) technology has gradually replaced other isolation methods such as local oxidation of silicon (LOCOS) used in traditional semiconductor device manufacturing and has become a commonly used isolation structure. [0003] With the continuous reduction of the feature size of semiconductor devices, the high aspect ratio deposition process is more and more widely used in the manufa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/762
Inventor 邓浩徐建华肖莉红
Owner SEMICON MFG INT (SHANGHAI) CORP
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