Digital correction method for array analog to digital converter of high-performance CMOS image sensor

Abstract

The invention belongs to the field of semiconductor image sensing, and specifically relates to a digital correction method for an array analog to digital converter of a high-performance CMOS image sensor. The invention provides an algorithm based on a multi-way collaborative digital correction technology. In particular, for the features that the number of the ADCs in the array ADC of the CIS is high, the area of a single ADC is very small and capacitance mismatch is high, according to the algorithm, an analog to digital converter array which is applied to the CIS and is realized by matching with the algorithm fully is designed. A low working voltage of 1.8V is employed in the integral design. The pixel voltage of the image sensor passes through a variable gain amplifier (VGA), then is directly sent to the analog to the digital converter (ADC) array for conversion, and then is sent to a digital correction engine for calculation. The array analog to digital converter applied to the CMOS image sensor is taken as an integral system. The mismatch problem due to the fact that the area of the single analog to digital converter of the array analog to digital converter is small is reduced to a great extent. According to the multi-way collaborative digital correction technology of the array analog to digital converter applied to the CMOS image sensor provided by the invention, the integral performance of the array analog to digital converter can be effectively improved.

Description

technical field [0001] The invention belongs to the field of semiconductor image sensing, and in particular relates to a multi-channel cooperative digital correction method for an array analog-to-digital converter chip of a high-performance CMOS image sensor. Background technique [0002] In recent years, CMOS image sensor (CIS) has achieved great success in both consumer electronics and professional fields. Except for very special applications, it has basically replaced the traditional CCD image sensor. The integrated analog-to-digital converter (ADC) array on the CIS chip helps to improve system integration, enhance the signal-to-noise ratio and signal anti-interference ability. At present, people have put forward higher requirements for CIS, mainly in the following three aspects: [0003] (1) High resolution. The resolution of the early CIS is VGA (640×480) level; at present, mainstream HDTV (1080p) requires a single-chip color CIS resolution of 9 million pixels, 4K lev...

AI Technical Summary

Problems solved by technology

Although the traditional SAR ADC also needs N operations to get the final conversion result, its power consumption has a very large advantage, which is very important for CIS chips that integrate thousands of ADCs internally.

Images