Low-power consumption APD bias controller, bias control method, and photoelectric receiver

A bias voltage control and photocurrent technology, applied in the field of optical communication, can solve the problems of APD/TIA overload damage, photocurrent overload, TIA bit error, etc., and achieve the effect of improving sensitivity and high signal-to-noise ratio.

Active Publication Date: 2016-10-19
旭创科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The response time of the DC / DC booster circuit is generally 0.1ms to 10ms. When the input optical power increases instantaneously within the response time of the DC / DC booster circuit, the photocurrent is overloaded, and TIA generates bit errors. APD / TIA Possible overload damage

Method used

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  • Low-power consumption APD bias controller, bias control method, and photoelectric receiver
  • Low-power consumption APD bias controller, bias control method, and photoelectric receiver
  • Low-power consumption APD bias controller, bias control method, and photoelectric receiver

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0097] Assume an APD, Vbr=+40V, n=2. It is further assumed that Vin=+0.8V, Vs is negligible, the sampling circuit gain (Rs*Gs) is 0.5k ohm, and the APD responsivity η=1mA / mW. Set V0=+40V, and select func(x) as a linear function, namely

[0098] func(Vfb)=32*Vfb+0.5=16e3*Iapd+0.5 (8)

[0099] Vapd=40–0.8–Vdrop=38.7–16k*Iapd (9)

[0100] Such as Figure 1aAs shown, we can draw the APD load curve (here a straight line) on the I-V diagram according to formula 9; on the other hand, according to formula 3, we can draw the APD operating characteristic curves with input optical power of 100uW and 500uW respectively. On the I-V diagram, the intersection of the APD operating characteristic curve and the load curve is the APD bias voltage and photocurrent corresponding to the input optical power.

[0101] Assuming that the sensitivity Pin=3.8uW, according to the I-V diagram, it can be obtained that Iapd=40uA at this time, according to formulas 8 and 9, Vdrop=1.14V, Vapd=38.06V, accor...

Embodiment 2

[0157] Continue to use the characteristic parameters and circuit parameters of the APD in Embodiment 1, and assume that the sensitivity index is 3.8uW, func (x) is set to be determined by formula 5 as a linear increasing function, i.e. func (Vfb)=16k*Iapd+0.5, and set B =32, Vset0=Vref=+1.25V, A=32, Vset_out0=V0 / A=1.25V. It is further assumed that Vdrop0=0.82V, Vdrop_min=Vdrop_extreme=0.5V, Vdrop_max=1.14V. The following describes the working mode of the Vdrop control loop when the input optical power increases from the sensitivity point of 3.8uW (corresponding to Iapd=40uA) to +1.94mW (corresponding to Iapd=2mA).

[0158] Calculated according to Example 1, when the input optical power is 3.8uW, if Vdrop is not controlled, according to Figure 1a The load curve and characteristic curve shown are Iapd=40uA, Vapd=38.06V, Vdrop=1.14V. After starting the Vdrop control loop, since Vdrop is greater than its target value of 0.82V, the error integrator gradually increases ΔV in the ...

Embodiment 3

[0210] Assume that the APD characteristic parameters, circuit parameters and Vdrop function are set the same as those in Embodiment 2. Configure R3=16k ohm, according to the aforementioned calibration steps and formulas 22 and 25, it can be obtained: V0set_opt=1.25V, C=0.5V, V2=40-0.5=39.5V. Further assume that the stabilization time of the Vdrop control loop is about 500ms, the current input optical power Pin=1.95mW, Iapd is stable at 2mA, the Vdrop control loop is stable, Vdrop=0.82V, V0=8.32V. The table below describes a change process of the working state of the circuit when the optical power is reduced to the sensitivity point Pin=3.8uW within 10us.

[0211] Table 1:

[0212]

[0213] According to the APD bias voltage control method provided by the present invention, the APD bias voltage controller and the bias voltage adjustment device can be conveniently designed by using hardware circuits or software algorithms or a combination of software and hardware.

[0214] ...

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PUM

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Abstract

The invention provides an APD bias control method, comprising: acquiring a light current strength voltage signal corresponding to a light current signal passing through an APD; overlaying the light current strength voltage signal with a bias setting signal, to generate a control signal, used to control voltage drop between output voltage of an adjustable power supply and APD voltage; and adjusting the output voltage of the adjustable power supply and the bias setting signal at the same time, to control the voltage drop in a preset range. The invention also provides an APD bias controller, comprising a bias voltage generation unit used to generate a bias voltage signal according to a light current strength feedback signal from external, to determine APD bias voltage, wherein the bias voltage generation unit also generates a second voltage signal, and compares the second voltage signal with one or more reference voltage, to generate undervoltage or overvoltage instructions. The APD bias controller and the photoelectric receiver are advantaged by low power consumption, high dynamic, high signal to noise ratio, high sensitivity, and timely temperature compensation.

Description

technical field [0001] The invention belongs to the field of optical communication, and more specifically relates to a low-power consumption APD (avalanche photodiode) bias voltage controller, an APD bias voltage control method and an APD photoelectric receiver. Background technique [0002] As the related art of the APD bias controller, the following related Patent Documents 1 and 2 will be described. [0003] Patent document 1 (publication number: CN1790946A) discloses a light receiving module with overload protection function, which is used in the field of optical fiber communication; it includes an avalanche photodiode; a DC / DC booster that provides reverse bias voltage for the avalanche photodiode voltage circuit; a sampling resistor for input light detection; one end of the sampling resistor is connected to the output end of the DC / DC boost circuit, and a A current limiting protection resistor, and the resistance value of the current limiting protection resistor is gr...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G05F1/56
CPCH04B10/6911G01J2001/444G01J2001/4466H01L31/02027
Inventor 王祥忠
Owner 旭创科技有限公司
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