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Thin film transistor, its manufacturing method and display device

A technology of thin film transistors and semiconductors, applied in the direction of transistors, semiconductor/solid-state device manufacturing, semiconductor devices, etc., can solve problems such as degradation, low-temperature process is difficult to achieve, and amorphous silicon field-effect mobility is low, so as to delay degradation and stabilize The effect of increasing and reducing the frequency of light irradiation

Active Publication Date: 2019-10-15
BOE TECH GRP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, amorphous silicon has disadvantages such as low field-effect mobility, strong photosensitivity, and opaque materials, while polysilicon thin-film transistors have complex manufacturing processes and low-temperature processes are difficult to achieve.
[0003] However, the oxide semiconductor used as the active layer in the current thin film transistor has a degradation phenomenon under the condition of light.

Method used

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  • Thin film transistor, its manufacturing method and display device
  • Thin film transistor, its manufacturing method and display device
  • Thin film transistor, its manufacturing method and display device

Examples

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preparation example Construction

[0083] The embodiment of the present invention also discloses a method for preparing a thin film transistor, comprising the following steps:

[0084] providing a substrate;

[0085] forming a gate having a rough surface on the substrate, the rough surface being located on a side facing away from the substrate;

[0086] preparing a gate insulating layer;

[0087] preparing a semiconductor layer on the gate insulating layer, the projection of the semiconductor layer on the substrate is within the projection of the gate on the substrate;

[0088] A source electrode and a drain electrode are prepared to obtain a thin film transistor.

[0089] Further, forming a gate with a rough surface on the substrate includes the following steps:

[0090] depositing a gate metal layer on the substrate;

[0091] Performing micro-etching treatment on the gate metal layer to form a gate metal layer with a rough surface on the side away from the substrate, the roughness Ra of the surface is 20-...

Embodiment 1

[0116] Step 1, providing a substrate;

[0117] Wherein, the base substrate can be glass or quartz.

[0118] Step 2, forming a gate on the substrate;

[0119] Specifically, a gate metal layer with a thickness of about 300-400 nanometers may be deposited on the substrate after step 1 by sputtering or thermal evaporation, and the gate metal layer is Cu.

[0120] Step 3, using hydrogen peroxide with a mass concentration of 3% to corrode the gate metal layer for 2 minutes to form a gate metal layer with an uneven structure on the surface away from the substrate, and the surface roughness Ra is 20~ 100nm.

[0121] Step 4, forming a gate insulating layer on the substrate after step 3;

[0122] Specifically, the plasma-enhanced chemical vapor deposition (PECVD) method can be used to deposit a gate insulating layer on the substrate after step 3. The gate insulating layer can be selected from oxide, nitride or oxynitride compound, and the corresponding reaction gas is SiH 4 , NH 3 ...

Embodiment 2

[0128] Step 1, providing a substrate;

[0129] Wherein, the base substrate can be glass or quartz.

[0130] Step 2, forming a gate on the substrate;

[0131] Specifically, a gate metal layer with a thickness of about 300-400 nanometers may be deposited on the substrate after step 1 by sputtering or thermal evaporation, and the gate metal layer is Cu.

[0132] Step 3, using hydrogen peroxide with a mass concentration of 1% to corrode the gate metal layer for 1 minute to form a gate metal layer with an uneven structure on the surface away from the substrate, and the surface roughness Ra is 20~ 100nm.

[0133] A transparent conductive layer is deposited on the surface of the gate metal layer with a rough surface, and the transparent conductive layer adopts indium tin oxide. A patterning process is performed on the gate metal layer and the transparent conductive layer to form a gate with a rough surface and the buffer layer covering the gate.

[0134] Step 4, forming a gate in...

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Abstract

A TFT, a method for fabricating the same, a display substrate, and a display device are disclosed. The TFT comprises a substrate, a gate, a gate insulating layer, semiconductor layer, a source, and a drain. The gate comprises a rough surface on a side facing the semiconductor layer. Since the surface of gate is uneven, the light which has been reflected on the surface of gate will no longer be reflected, or will be directly scattered to other directions. The incident light from the backlight source cannot impinge onto the semiconductor layer by continuous reflection. This reduces the possibility that the semiconductor layer is irradiated by light, and improves stability of TFT.

Description

technical field [0001] The invention relates to the field of transistors, in particular to a thin film transistor, a preparation method thereof and a display device. Background technique [0002] A thin film transistor is a field-effect semiconductor device, including several important components such as a substrate, a gate, a gate insulating layer, an active layer, and a source and drain. Among them, the active layer has a crucial influence on the device performance and manufacturing process. In the past ten years, liquid crystal display devices with silicon thin-film transistors as driving units have achieved rapid development due to their advantages of small size, light weight, and high quality, and have become mainstream information display terminals. However, amorphous silicon has disadvantages such as low field-effect mobility, strong photosensitivity, and opaque materials, while polysilicon thin-film transistors have complex manufacturing processes for large areas, a...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/423H01L21/336H01L29/786
CPCH01L29/42384H01L29/66742H01L29/786H01L29/66765H01L29/66969H01L29/78633H01L29/78669H01L29/78678H01L29/7869H01L27/1225H01L29/41733H01L29/423
Inventor 秦纬
Owner BOE TECH GRP CO LTD