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Trench gate SOI-LIGBT device structure with low turn-off loss

A technology of turn-off loss and device structure, which is applied in the direction of semiconductor devices, electrical components, circuits, etc., can solve the problems of very high process requirements and unsatisfactory turn-off loss effects, and achieve carrier recombination reduction, carrier Uniform distribution and reduced turn-off loss

Inactive Publication Date: 2017-06-13
UNIV OF ELECTRONIC SCI & TECH OF CHINA +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The first method has very high requirements on the process, while the second method is not difficult in process, but the effect of reducing the turn-off loss is not ideal.

Method used

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  • Trench gate SOI-LIGBT device structure with low turn-off loss
  • Trench gate SOI-LIGBT device structure with low turn-off loss
  • Trench gate SOI-LIGBT device structure with low turn-off loss

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Embodiment 1

[0022] Such as figure 2 As shown, a low turn-off loss trench gate SOI-LIGBT device structure includes a P-type substrate 9, a buried oxide layer of silicon dioxide 8, an N-type drift region 3, and the inside of the N-type drift region 3. One end is provided with a P-type well region 4, the other end is provided with an N-buffer layer 2, an oxide layer 10 is provided on the surface of the device, and an N-type source terminal 5 and an N-type source terminal 5 are provided above the inside of the P-type well region 4. The adjacent P-type contact region 6; the N-type anode region 1 is arranged above the inside of the N-buffer layer 2; the metal layer is arranged above the N-type source terminal 5, the P-type contact region 6 and the N-type anode region 1 The right side of the channel between the source end 5 and the P-type well region 4 is a gate oxide layer, and the right side of the gate oxide layer is polysilicon 7, and the polysilicon 7 is located on the right side of the P-...

Embodiment 2

[0026] Such as image 3 As shown, the low turn-off loss slot gate SOI-LIGBT structure of this embodiment is basically the same as that of Embodiment 1, the difference is that the N-type drift region 3 between the P-type well region 4 and the N-buffer layer 2 is provided with Silicon dioxide tank dielectric 11 ; the silicon dioxide tank dielectric 11 is located on the right side of the polysilicon 7 .

[0027] The length of the silica trough dielectric 11 is Wt, which has a minimum value of 1 μm.

[0028] Preferably, the right side of the silicon dioxide tank medium 11 can be connected to the left side of the N-buffer layer 2, that is, L d to zero.

[0029] The depth of the silicon dioxide trench dielectric 11 is Dt, which is greater than the depth Lg of the polysilicon 7 and satisfies the thickness of the silicon layer, that is, the thickness of the N-type drift region 3 ts>Dt≥Lg+1um.

[0030] Compared with the conventional groove gate SOI-LIGBT device, the groove gate of t...

Embodiment 3

[0032] Such as Figure 7 As shown, the low turn-off loss slot-gate SOI-LIGBT structure of this embodiment is basically the same as that of Embodiment 2, except that an N-type carrier storage layer 12 is provided under the P-type well region 4 .

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Abstract

The invention provides a trench gate SOI-LIGBT device structure with low turn-off loss. The trench gate SOI-LIGBT device structure comprises a P-type substrate, buried oxygen layer silica, an N-type drift region, a P-type well region, an N-buffer layer, an oxide layer, a N-type source end, a P-type contact region, and an N-type anode region. A gate oxide layer is arranged on the right side of a channel between the source end and the P-type well region. Polysilicon is arranged on the right side of the gate oxide layer is located on the right side of the P-type well region and the left side of the N-buffer layer. The trench gate SOI-LIGBT device structure has a double-gate structure and has a greater current capability under the same condition. The introduction of an N-type carrier storage layer reduces the direct injection of holes into the P-type well region, makes more uniform carrier distribution, facilitates the carrier recombination during turning off, and shortens turn-off time. The trench dielectric silica reduces the effective space of the N-type drift region, blocks the injection of the carrier on the right side, and forms a carrier accumulation layer. Based on the two effects, the turn-off loss of the trench gate SOI-LIGBT device structure is greatly reduced.

Description

technical field [0001] The invention belongs to the technical field of semiconductors, and in particular relates to a slot-gate SOI-LIGBT device structure with low turn-off loss. Background technique [0002] High-voltage power devices are the foundation and core of power electronics technology, which have the characteristics of high voltage resistance and high conduction current density. Improving the withstand voltage capability of power devices and reducing the turn-off loss of power devices is the key to designing devices. As an important class of power semiconductor devices, IGBT devices (insulated gate bipolar transistor devices) are widely used in the field of power electronics. However, due to the low hole injection efficiency and low carrier concentration distribution of the IGBT device at the junction of the P-body region and the N-drift region, the saturation voltage drop of the device increases. When it is turned off, the N-drift region A large number of minori...

Claims

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Application Information

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IPC IPC(8): H01L29/06H01L29/423H01L29/739
CPCH01L29/0638H01L29/42304H01L29/7394
Inventor 乔明李路曹厚华何逸涛杨文张波
Owner UNIV OF ELECTRONIC SCI & TECH OF CHINA