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Method for removing TM-SOI silicon defects

A TM-SOI, top-layer silicon technology, applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve problems such as atomic displacement, affecting SOI quality, and achieve the effect of reducing particles, improving roughness, and improving cleanliness

Active Publication Date: 2017-07-25
SHENYANG SILICON TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] From the perspective of surface flatness, the CMP process effectively improves the roughness of the SOI stripped surface and removes the damaged layer on the surface. However, during ion implantation, the ions inevitably collide with the lattice atoms in the material, resulting in atomic displacement, resulting in a large number of defects
When the dose of ion implantation is high, these defects can also overlap and interact to produce more complex defects
These defects have an important impact on the electrical characteristics and seriously affect the quality of SOI
These problems cannot be solved by relying solely on the CMP process.
[0006] Therefore, using TM-SOI technology and CMP technology to completely remove the damaged layer after the split, repair the defects in the top silicon layer of TM-SOI, and reduce the roughness, there are great process problems and technical difficulties.

Method used

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Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0049] Using TM-SOI technology, 3 pieces of SOI wafer material with a diameter of 200mm splits were prepared, and they were placed in the reaction chamber of the epitaxial furnace for corrosion and defect repair. The specific steps are as follows:

[0050] (1) Pass H into the reaction chamber 2 (Flow rate 50 liters / min, purity> 99.99999%), heating at 1050°C for 30 seconds to remove the natural oxide layer and impurities on the surface of the silicon wafer in situ;

[0051] (2) Reduce the pressure in the reaction chamber, and the pumping pressure reaches 40torr, and the SOI silicon wafer treated in step (1) is placed in an anhydrous HCl atmosphere to etch the silicon layer on its surface for 60 seconds;

[0052] (3) Refill H of the reaction chamber 2 (Flow rate 20 liters / min, purity> 99.99999%), restore the reaction chamber pressure to normal pressure, remove impurities and residual HCl in the reaction chamber, cool it to a loading temperature of 850°C, and send it to the transfer cham...

Embodiment 2

[0063] Take 2 pieces of the same SOI wafer material of the same batch as in Example 1, and place them in the reaction chamber of the epitaxial furnace for HCl corrosion and defect repair. The different conditions from Example 1 are that the corrosion temperature is 850°C, the pumping pressure reaches 20 torr, and the corrosion is 120 seconds. Table 3 shows the test data:

[0064] table 3

[0065]

[0066]

[0067] After processing under this condition, the measured particle results are shown in Table 4, and the particle diagram is shown in image 3 , Figure 4 Shown.

[0068] Table 4

[0069]

Embodiment 3

[0079] The 10 SOI sheets in Example 1, Example 2, Comparative Example 1 and Comparative Example 2 were subjected to SECCO etching (pure water, 49% HF, potassium dichromate) for 20 seconds, and then observed under an optical microscope to obtain The results are shown in Table 7:

[0080] Table 7

[0081] Numbering Number of defects (ea / cm 2 )

[0082] From the data comparison in Table 7, it can be seen that the method adopted in the present invention is significantly better than the CMP process in terms of defect removal.

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Abstract

The invention discloses a method for removing TM-SOI silicon defects and belongs to the technical field of SOI manufacturing. The method includes the following steps: using HC1 chemical corrosion to remove damaged layer on the surface of a film SOI silicon wafer which is formed by using TM-SOI, and at the same time, at high temperature and under low pressure, repairing the defects caused by injection to the silicon layer of the film SOI top layer, thus acquiring a high quality SOI silicon wafer. The SOI manufactured by the method has improved surface roughness, has defects repaired, and can be used to manufacture SOI materials having excellent electrical characteristics.

Description

Technical field [0001] The invention relates to the technical field of SOI, in particular to a method for removing top silicon defects of TM-SOI (Silicon on Insulator). Background technique [0002] TM-SOI is an SOI technology based on the ion implantation stripping method (smart-cut method). The "TM-SOI smart cutting method" has applied for an invention patent in China, with application number 200310123080.1, and obtained the invention patent authorization of the Chinese Patent Office. Specific method: Among the two silicon wafers, an oxide film is formed on at least one of them, and ion implantation is used to form an ion separation layer in the thin film of one of the silicon wafers, so that the ion-implanted surface is separated by oxidation The film is bonded to the other silicon wafer at room temperature to form a bonded body. Then it is annealed to make the bonding surface firm. Then increase the temperature to above the transition temperature, and after the temperature ...

Claims

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Application Information

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IPC IPC(8): H01L21/762H01L21/322
CPCH01L21/3226H01L21/76254
Inventor 高文琳柳清超孙伟
Owner SHENYANG SILICON TECH
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