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Horizontal structured LED and preparation method therefor

A technology of lateral structure and dry etching, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc. It can solve the problems of large lattice mismatch, unfavorable preparation of Ge-Sn alloy alloy, high dislocation density of Ge buffer layer, etc. problem, to achieve good interface characteristics and improve device performance

Inactive Publication Date: 2017-09-15
厦门科锐捷半导体科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Judging from the current realization of the Ge buffer layer on the Si substrate, due to the large lattice mismatch between the Si substrate and the Ge epitaxial layer, the Ge buffer layer prepared by the conventional process has a high dislocation density, which is not conducive to the subsequent high-quality Ge buffer layer. - Preparation of Sn Alloy Alloy

Method used

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  • Horizontal structured LED and preparation method therefor
  • Horizontal structured LED and preparation method therefor
  • Horizontal structured LED and preparation method therefor

Examples

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Embodiment 1

[0049] See figure 1 , figure 1 A flow chart of a method for manufacturing a lateral structure LED provided in an embodiment of the present invention, wherein the method includes:

[0050] (a) select SOI substrate;

[0051] (b) growing Ge epitaxial layer on SOI substrate;

[0052] (c) performing crystallization treatment on the Ge epitaxial layer to form a crystallized Ge layer;

[0053] (d) growing a ridge-shaped Ge-Sn alloy layer on the crystallized Ge layer;

[0054] (e) making an N-type Ge-Sn alloy layer and a P-type Ge-Sn alloy layer in the ridge-shaped Ge-Sn alloy layer;

[0055] (f) Making electrodes to complete the preparation of the LED.

[0056] Preferably, step (b) comprises:

[0057] (b1) growing a Ge seed layer on the SOI substrate by using a CVD process at a temperature of 275° C. to 325° C.;

[0058] (b2 at a temperature of 500° C. to 600° C., using a CVD process to grow a Ge main body layer on the Ge seed crystal layer;

[0059] (b3) Generate the first S...

Embodiment 2

[0088] Please refer to Figure 3a-Figure 3l , Figure 3a-Figure 3l It is a schematic diagram of a preparation method of a lateral structure LED according to an embodiment of the present invention, and the preparation method includes the following steps:

[0089] Step 1, select the substrate. Select SOI substrate 301, such as Figure 3a shown.

[0090] Step 2, growing a Ge seed layer 302 . At a temperature of 275° C. to 325° C., a Ge seed layer 302 with a thickness of 40 to 50 nm is grown on an SOI substrate 301 by using a CVD process, such as Figure 3b shown.

[0091] Step 3, growing a Ge main body layer 303 . At a temperature of 500° C. to 600° C., a Ge main body layer 303 with a thickness of 120 to 150 nm is grown on the Ge seed layer 302 by using a CVD process, such as Figure 3c shown.

[0092] Step 4, grow the first SiO 2 protective layer 304 . Using a CVD process, grow SiO with a thickness of the first 150 nm on the Ge host layer 303 2 Oxide layer 304, such a...

Embodiment 3

[0102] Please refer to Figure 4 , Figure 4 It is a schematic structural diagram of a lateral structure LED provided by an embodiment of the present invention. The LED employs the above as Figure 3a-Figure 3l prepared as indicated. Specifically, the LED includes: SOI substrate 401, crystallized Ge layer 402, Ge-Sn alloy layer 403, N-type Ge-Sn alloy layer 404, P-type Ge-Sn alloy layer 405, SiO 2 Passivation layer 406 and Cr-Au alloy electrode 407.

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Abstract

The invention relates to a horizontal structured LED and a preparation method therefor. The preparation method comprises the steps of selecting an SOI substrate; performing growth of an epitaxial layer on the SOI substrate; manufacturing a crystallized Ge layer; growing and manufacturing a ridge-shaped Ge-Sn alloy layer on the crystallized Ge layer; manufacturing an N type Ge-Sn alloy layer and a P type Ge-Sn alloy layer in the ridge-shaped Ge-Sn alloy layer; and manufacturing an electrode to complete preparation of the LED. A laser re-crystallization process is utilized to process the Ge epitaxial layer on the SOI substrate to enable the epitaxial layer to be melted and re-crystallized, so as to horizontally release the dislocation defects of the Ge epitaxial layer to obtain the low-dislocation-density Ge epitaxial layer; and meanwhile, the crystallization region can be accurately controlled by the LRC (laser re-crystallization) process, so that high interface feature is realized between Si and Ge materials, thereby improving device performance.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a lateral structure LED and a preparation method thereof. Background technique [0002] In recent years, in order to overcome the problems of metal interconnection signal delay and power consumption in large-scale integrated circuits, Si optoelectronics technology, as the core technology in high-speed optical interconnection, has become a hot spot and focus of research and development in the field. High-quality light source devices on Si substrates are an important link to realize Si-based monolithic optoelectronic integration. [0003] Ge is an indirect bandgap semiconductor, which can be transformed into a direct bandgap semiconductor through Sn alloying modification technology (Sn composition is greater than 8%). Direct bandgap Ge-Sn alloys are applied to Si-based waveguide LEDs, which not only have high luminous efficiency, but are also compatible wit...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L33/00H01L33/34H01L21/02
CPCH01L33/0054H01L21/02532H01L21/02683H01L33/34
Inventor 刘晶晶
Owner 厦门科锐捷半导体科技有限公司
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