Image sensor and manufacturing method thereof
An image sensor and optical channel technology, applied in the field of image sensors, can solve the problems of affecting the service life of image sensors, affecting the sensitivity of image sensors, and warping of alternate isolation layers in edge regions, so as to reduce deposition rate and polishing rate, improve sensitivity, good uniformity
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment 1
[0027] A specific manufacturing process of an image sensor is as follows:
[0028] See figure 1 A silicon substrate with a resistivity of 80-100Ω·m in the N(100) direction is used as the semiconductor substrate 1, and it is cleaned by RCA with a cleaning solution containing SC1, HF, and SC2. A 10nm thermal oxide layer is formed on the semiconductor substrate 1, a 35nm polysilicon layer and a 15nm SiN layer are sequentially deposited on the thermal oxide layer by chemical vapor deposition, and a 50nm deep groove is etched through a photoresist mask. Remove the photoresist and form 25nm SiO in the above trench 2 oxide layer, formed in the SiO 2 Ion implantation is performed on the oxide layer to form an N-channel stop layer, and 500nm SiO is formed in the N-channel stop layer by chemical vapor deposition. 2 layer, and annealed in nitrogen at a temperature of 950°C for 60 minutes, and then planarized to form shallow trench isolation.
[0029] The photoresist is used as a mas...
Embodiment 2
[0041] A specific manufacturing process of an image sensor is as follows:
[0042] See Figure 8 A silicon substrate with a resistivity of 80-100Ω·m in the N(100) direction is used as the semiconductor substrate 1, and it is cleaned by RCA with a cleaning solution containing SC1, HF, and SC2. A 10nm thermal oxide layer is formed on the semiconductor substrate 1, a 35nm polysilicon layer and a 15nm SiN layer are sequentially deposited on the thermal oxide layer by chemical vapor deposition, and a 50nm deep groove is etched through a photoresist mask. Remove the photoresist and form 25nm SiO in the above trench 2 oxide layer, formed in the SiO 2 Ion implantation is performed on the oxide layer to form an N-channel stop layer, and 500nm SiO is formed in the N-channel stop layer by chemical vapor deposition. 2 layer, and annealed in nitrogen at a temperature of 950°C for 60 minutes, and then planarized to form shallow trench isolation.
[0043] The photoresist is used as a mas...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 


