A kind of graphene field effect transistor manufacturing method based on self-alignment process
A technology of field effect transistors and self-alignment technology, which is applied in the direction of transistors, semiconductor/solid-state device manufacturing, semiconductor devices, etc., can solve problems such as device short circuit, achieve stable performance, avoid direct contact, and solve the effect of device short circuit
Active Publication Date: 2020-12-22
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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[0005] The method for manufacturing a graphene field effect transistor based on a self-alignment process provided by the present invention can address the deficiencies of the prior art and effectively solve the problem that the gate electrode is easily in direct contact with graphene and causes a short circuit of the device
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[0025] In order to make the purposes, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments It is only a part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.
[0026] figure 1 A schematic diagram of the structure of a transistor formed after developing a negative photoresist in the prior art is shown. As shown in the figure, the substrate 110 is covered with a layer of graphene film 120, a self-alignment layer 130 (not shown) is grown on the graphene film 120, and the sel...
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Abstract
The invention provides a graphene field effect transistor manufacturing method based on the self-alignment technology, and the method comprises the steps: providing a substrate, depositng a graphene layer on the substrate, and depositing a self-alignment layer on the graphene layer; carrying out the spinning coating of first photoresist on the self-alignment layer, removing a part of the self-alignment layer and the graphene layer through patterning and etching, and then removing the first photoresist; carrying out the spinning coating of second photoresist on the self-alignment layer, carrying out the etching of a slot at the center of the self-alignment layer after patterning, and keeping the second photoresist; depositing a grid dielectric layer and a grid electrode in the slot, carrying out the spinning coating of a third photoresist layer, carrying out the patterning, keeping the third photoresist above the slot, carrying out the etching of a part of the grid dielectric layer and the grid electrode, forming a grid structure, and removing the third photoresist; and generating a source electrode and a drain electrode. The method can achieve the application of positive photoresist in a region limiting the grid dielectric layer, prevents the grid electrode from making direct contact with the graphene layer, and enables the performance of a graphene field effect transistor to be more stable.
Description
technical field [0001] The invention relates to the technical field of microelectronics and solid state electronics, in particular to a method for manufacturing a graphene field effect transistor based on a self-alignment process. Background technique [0002] As the feature size of transistors shrinks, due to physical laws such as short channel effects and limitations of manufacturing costs, mainstream silicon-based materials and CMOS technologies are developing to the 10nm process node, making it difficult to continue to improve. At present, nanoelectronics based on carbon materials has received extensive attention, especially with the discovery of graphene materials, graphene has ultra-high electron mobility and electron saturation velocity, and has a two-dimensional planar structure, which can be compared with traditional Silicon process integration, so it is considered to be a new material for next-generation integrated circuits that can replace silicon. Graphene-based...
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IPC IPC(8): H01L29/16H01L29/786H01L21/336
CPCH01L29/1606H01L29/66045H01L29/66742H01L29/78684
Inventor 金智黄昕楠姚尧彭松昂史敬元张大勇
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI