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Sapphire substrate nanopore preparation method

A sapphire substrate and nanohole technology, applied in electrical components, circuits, semiconductor devices, etc., can solve the problems of poor repeatability, high processing cost, low efficiency, etc., and achieve improved light extraction efficiency and controllable duty cycle. , cycle controllable effect

Inactive Publication Date: 2017-11-14
SUZHOU INST OF NANO TECH & NANO BIONICS CHINESE ACEDEMY OF SCI
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Problems solved by technology

[0003] At present, the methods that can obtain nanoscale patterning mainly include electron beam lithography, immersion lithography, nanoimprinting, etc. These methods have more or less disadvantages such as high processing costs, low efficiency, and poor repeatability.

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  • Sapphire substrate nanopore preparation method
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  • Sapphire substrate nanopore preparation method

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Embodiment Construction

[0026] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the specific embodiments set forth herein. Rather, the embodiments are provided to explain the principles of the invention and its practical application, thereby enabling others skilled in the art to understand the invention for various embodiments and with various modifications as are suited to particular intended uses.

[0027] refer to figure 1 , and combined with Figure 2 to Figure 7 As shown, the present embodiment provides a method for preparing nanopores on a sapphire substrate, the method comprising the following steps:

[0028] Step S1: Deposit a single crystal film 2 on the surface of the sapphire substrate 1, the single crystal film 2 is a silicon dioxide single crystal film with a thickness of 200nm to 300nm, such as figure 2 S...

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Abstract

The invention provides a sapphire substrate nanopore preparation method, which comprises the steps of: forming a layer of single crystal thin film on the surface of a sapphire substrate; arranging a layer of photoresist on the single crystal thin film through spin-coating; exposing the photoresist by means of a photoetching machine; developing the exposed photoresist to form a nanopore pattern; carrying out dry etching on the single crystal thin film by taking the photoresist on which the nanopore pattern is formed as a mask, and transferring the nanopore pattern onto the single crystal thin film; removing the photoresist, carrying out dry etching on the sapphire substrate by taking the single crystal thin film on which the nanopore pattern is formed as a mask, and transferring the nanopore pattern onto the sapphire substrate; and removing the single crystal thin film. According to the sapphire substrate nanopore preparation method provided by the invention, the nanopore slicing block patterned sapphire substrate having the advantages of uniform structure, controllable period, controllable duty ratio and low cost can be realized quickly through combining the laser interference photoetching technology with the dry etching technology.

Description

technical field [0001] The invention relates to the technical field of semiconductor micro-nano processing, in particular to a method for preparing nanoholes on a sapphire substrate. Background technique [0002] Since the patterned substrate technology can not only reduce the dislocation density of the epitaxial GaN layer, improve the crystal quality, but also greatly improve the light extraction efficiency of light-emitting diodes, micron-scale patterned substrate technology is widely used in the LED field. At the same time, the period of the nano-patterned substrate structure is close to the emission wavelength, which is prone to Bragg scattering, and the pattern density is larger than that of the micron-scale, so the light extraction efficiency of the nano-patterned substrate is better than that of the micron-scale patterned substrate. [0003] At present, the methods that can obtain nanoscale patterning mainly include electron beam lithography, immersion lithography, na...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L33/00
CPCH01L33/007
Inventor 王敏锐桑伟华王龙林露张宝顺
Owner SUZHOU INST OF NANO TECH & NANO BIONICS CHINESE ACEDEMY OF SCI
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