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Technology of improving ion implantation and boron element diffusion in silicon epitaxial growth

A technology of ion implantation and silicon epitaxy, which is applied in the manufacture of electrical components, electrical solid-state devices, semiconductor/solid-state devices, etc., can solve problems affecting threshold voltage control, affecting the performance of 3D NAND flash memory, etc., and achieve the effect of increasing threshold voltage

Active Publication Date: 2018-02-23
YANGTZE MEMORY TECH CO LTD
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Problems solved by technology

[0009] After the above process, deposition and etching processes such as ONOP (oxide / nitride / oxide / polysilicon) may be required. These subsequent process steps will generate a lot of heat and form a high-temperature process, and due to the doped boron element The atomic number is the first and the molecular weight is small, so it is very easy to diffuse in these subsequent high-temperature processes, so that it can cross the interface between the silicon epitaxial layer and the substrate, and run from the silicon epitaxial layer to the silicon substrate (see Figure 2a -b, Figure 2a The white arrow in the middle and bottom is the direction of boron element diffusion), which affects the control of the threshold voltage (Vt), and finally affects the performance of 3D NAND flash memory

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  • Technology of improving ion implantation and boron element diffusion in silicon epitaxial growth

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[0034] Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided for more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0035] In the interest of clarity, not all features of an actual implementation are described. In the following description, well-known functions and constructions are not described in detail since they would obscure the invention with unnecessary detail. It should be appreciated that in the development of any actual embodiment, numerous implementation details must be worked out to achieve the developer's specific goals, such as ch...

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Abstract

The invention provides technology of improving ion implantation and boron element diffusion in silicon epitaxial growth in 3D NAND flash memory structure. Through adopting air having F and / or CI, plasma processing is conducted on a silicon groove interface in silicon epitaxial growth, and thereby monocrystalline silicon in silicon epitaxial growth interface can be effectively damaged and then willbe converted into amorphous silicon. As the epitaxial growing speed of the amorphous silicon interface is lower than that of the monocrystalline silicon interface, the forming of a vacancy (Void) between a silicon epitaxial layer and a substrate can be facilitated. The formed vacancy (Void) becomes a barrier of boron element interface diffusion, which effectively blocks the boron element doped during ion implantation from diffusing to the silicon substrate from the silicon epitaxial layer. Accordingly, the characteristic of the threshold-voltage (vt) of the silicon epitaxial layer can be improved, and the integral performance of the 3D NAND flash memory can be finally enhanced.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a 3D NAND flash memory structure and a manufacturing method thereof, in particular to a process capable of improving the diffusion of ion-implanted boron elements in silicon epitaxy. Background technique [0002] With the development of planar flash memory, the production process of semiconductors has made great progress. However, in recent years, the development of planar flash memory has encountered various challenges: physical limits, existing development technology limits, and storage electron density limits. In this context, in order to solve the difficulties encountered in planar flash memory and to seek lower production costs per unit storage unit, various three-dimensional (3D) flash memory structures have emerged, such as 3D NOR (3D or not) flash memory and 3D NAND (3D NAND) flash memory. [0003] Wherein, in the 3D flash memory of the NOR structure, memory c...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/225H01L27/11568H01L27/11578H10B43/20H10B43/30
CPCH01L21/2253H10B43/20H10B43/30
Inventor 何佳刘藩东吴林春张若芳王鹏夏志良霍宗亮
Owner YANGTZE MEMORY TECH CO LTD
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