SOPC-based embedded dual-core servo controller and designed method thereof

Abstract

The invention provides an SOPC-based embedded dual-core servo controller and a designed method thereof. The hardware architecture includes an FPGA, a power system, a program FLASH, a data FLASH, a driver, a data instruction communication unit, and a sensor data reading unit and the like, wherein the power system, the program FLASH, the data FLASH, the driver, the data instruction communication unit, and the sensor data reading unit and the like are in signal connection with the FPGA. The FPGAs is provided with two Microblaze soft-core processors to carry out dual-core parallel computing. A plurality of IP soft cores are signal connection by a PLB bus. All Microblaze soft-core processors carry out data exchange with all IP soft cores through PLB buses. The two Microblaze soft-core processors carry out dual-core data communication. According to functional requirements of the control system, the hardware architecture and interface type are determined; the software bottom architecture is determined; compiling is carried out by using an XPS tool; a top interface file is outputted; and top-level soft core controller design development is carried out at an SDK platform. Therefore, the co-processing ability of the controller is enhanced. The SOPC-based embedded dual-core servo controller has advantages of abundant resources, strong expandability, high reliability, low cost and simple design.

Description

technical field [0001] The invention relates to the field of digital servo control systems, in particular to a SOPC-based embedded dual-core servo controller and a design method thereof. Background technique [0002] At present, the hardware platform of digital servo controller mainly includes three architectures: DSP, DSP+FPGA, and FPGA. The servo controller based on DSP has the advantages of flexible design and convenient debugging, but the peripheral resources are limited and cannot adapt to the current various communication interfaces. To meet the requirements of high-speed parallel processing, even if TI launched the F28M35 dual-core processor, this drawback cannot be changed. The servo controller based on DSP+FPGA can meet the requirements of flexible design and parallel communication at the same time, but the circuit is more complicated and the cost is higher. higher. In recent years, with the development of microelectronics technology, on-chip programmable technolog...

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Problems solved by technology

[0006] At present, FPGA-based single-core digital servo control systems use a single main thread, and multi-task scheduling needs to use query or interrupt methods, which increases the waiting time in the blocked state, prolongs the data update cycle, and has no absolute meaning Parallel processing on

In the face of practical problems such as multi-tasking and large data volume, the disadvantages of long execution time and inability to parallelize processing of single-core processors are gradually revealed, and the real-time control and algorithm accuracy cannot be guaranteed.

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