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DC Bus Voltage Fluctuation Sampling Method Based on Selective Harmonic Elimination Pulse Width Modulation

A technology of DC bus voltage and pulse width modulation, applied in the direction of controlling electromechanical brakes, controlling electromechanical transmission devices, controlling generators, etc., can solve the problems of low switching frequency, harmonics affecting control performance, long control cycle, etc., and achieve additional output The effect of small voltage harmonics, reduction of low-frequency harmonic currents, output torque fluctuations, and excellent harmonic characteristics

Active Publication Date: 2021-02-05
ZHEJIANG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The difficulties in using software to realize compensation for SHEPWM mainly include the following three points: 1. Due to the characteristics of the digital control system, the control quantity loaded at the beginning of each control cycle must be calculated in the previous control cycle, and the selection of harmonic elimination pulse When the wide modulation technology is applied, the switching frequency is low, and the control cycle is also long. In this way, if the pulse command calculated based on the DC bus voltage sampled in the current cycle is used to load in the next cycle, a delay equivalent to 1.5 control cycles will be introduced. Therefore, the bus voltage in the next cycle must be known in advance in the previous cycle; 2. There is no concept of carrier in the implementation of SHEPWM, which leads to the traditional duty cycle compensation based on carrier cycle The method is difficult to implement; 3. The generation of the selected harmonic elimination pulse width modulation waveform is synchronized with the phase of the voltage vector, so the phase of the voltage vector output by the current control link must be stable, otherwise it will cause confusion in the pulse output sequence, which brings to the feedback control very difficult

Method used

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  • DC Bus Voltage Fluctuation Sampling Method Based on Selective Harmonic Elimination Pulse Width Modulation
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  • DC Bus Voltage Fluctuation Sampling Method Based on Selective Harmonic Elimination Pulse Width Modulation

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Embodiment 1

[0025] Such as Figure 1 to Figure 3 As shown, the DC bus voltage fluctuation sampling method based on selected harmonic elimination pulse width modulation includes the following steps:

[0026] 101) Voltage vector conversion step: converting a given voltage vector generated by standard vector control into polar coordinates to obtain a voltage vector in polar coordinates. On the one hand, the phase of the given voltage vector generates a synchronous trigger signal, which is used to start each control cycle, obtain start-up vector control and DC bus voltage fluctuation sampling; Used to generate the raw pulse trains for each phase.

[0027] 102) Sampling and predicting step: formed by predicting the voltage vector in polar coordinates, delaying the waveform of the given voltage vector by a certain execution cycle time from the current moment to obtain the predicted waveform, and setting a certain sampling frequency to collect the predicted waveform to obtain the processing int...

Embodiment 2

[0034] Such as figure 1 Shown is the overall schematic diagram of the system structure. The dotted box on the right is the standard vector control process. The given voltage vector finally generated by vector control is transformed into polar coordinates. On the one hand, the phase of the given voltage vector generates a synchronous trigger signal, which is used to start each control cycle, start vector control calculation and DC bus voltage fluctuation compensation; to generate the original pulse train for each phase. The angle adjustment value obtained by DC bus voltage fluctuation compensation acts on the original pulse sequence, and finally generates the compensated pulse sequence. The phases of the above synchronous trigger signals are consistent with the boundaries of the synchronous processing intervals to be described later, so as to ensure that each control result is applicable to the execution of the next interval.

[0035] Such as Figure 2 to Figure 4 As shown...

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Abstract

The invention discloses a direct-current bus voltage fluctuation sampling method based on selective harmonic elimination pulse width modulation and particularly relates to control of a three-phase alternating-current motor driving system. The method comprises steps of firstly, according to SHEPWM switch angle distribution characteristics in all kinds of different frequency division numbers, determining synchronous processing intervals; according to periodicity of bus fluctuation, using sliding prediction windows generated by a repetition predictor to predict current bus voltage waveforms in the next processing interval; and according to the predicted bus voltage waveform and the switch moment, estimating flux linkage errors in the next processing interval, and correspondingly adjusting theswitch moment so as to eliminate flux linkage errors. According to the invention, excellent harmonic characteristics of SHEPWM can be kept; sliding prediction windows are generated, so waveforms of bus voltage in the future period from the moment at any moment can be predicted; and conditions are provided for implementation of compensation.

Description

technical field [0001] The invention relates to the technical field of control of three-phase AC motors, more specifically, it relates to a DC bus voltage fluctuation sampling method based on selected harmonic elimination pulse width modulation. Background technique [0002] Harmonic Elimination Pulse Width Modulation (SHEPWM) is selected as one of the synchronous optimization modulation techniques, which can eliminate the lower-order voltage harmonic components as much as possible under a certain number of pulses per cycle, thereby reducing the overall harmonic current consumption . From another point of view, using this technology can achieve a certain limit of the total amount of current harmonics and reduce the number of pulses of each phase in each fundamental wave period as much as possible, thereby reducing the switching frequency of the inverter and reducing switching losses. . Therefore, this technology is widely used in high-power motor drives and other occasions...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H02P21/14H02P27/08
CPCH02P21/14H02P27/08
Inventor 黄晓艳赵硕丰方攸同吴立建
Owner ZHEJIANG UNIV