MEMS SOI wafer and preparation method, and MEMS sensor and preparation method

Abstract

The invention discloses a MEMS SOI wafer and a preparation method, and a MEMS sensor and a preparation method thereof. The wafer structure comprises a substrate, a dielectric layer, a device layer anda cavity, wherein the cavity is located in the substrate, the cavity is formed with a support structure, the depth of the support structure is the same as the depth of the cavity, and the dielectriclayer is located between the substrate and the device layer. The preparation method comprises the following steps: preparation of a substrate; fabrication of a groove on the substrate; preparation ofa wafer on the device layer; fabrication of a dielectric layer on the wafer on the device layer; bonding of the wafer on the device layer to the substrate; and formation of a MEMS SOI wafer. The MEMSsensor fabricated by the wafer has the advantages of high practicability, excellent performance, good stability, and strong resistance to external environments.

Description

technical field [0001] The invention relates to a MEMS SOI wafer and a preparation method, a MEMS sensor using the MEMS SOI wafer and the preparation method and a preparation method thereof, and belongs to the technical field of MEMS sensors. Background technique [0002] MEMS membrane structure plays a pivotal role for MEMS sensors, especially MEMS pressure sensors. Early MEMS film structures are usually formed by traditional anisotropic wet etching in semiconductor technology, that is, using semiconductor materials, such as different crystal orientations of single crystal silicon, to have different etching rates in alkaline solutions. The disadvantages of this process are low efficiency, poor consistency, and low wafer utilization. With the advancement of semiconductor micromachining technology, silicon-on-insulator (Cavity-SOI, C-SOI) wafers with embedded cavities are increasingly used in the fabrication of MEMS sensors and gradually replace anisotropic Wet etching tech...

AI Technical Summary

Problems solved by technology

For thicker MEMS film structures, the C-SOI process performs very well; but for thinner MEMS film structures (such as less than 10um), it is really dwarfed by the main reasons: first, in thinning, During the polishing process, as the thickness of C-SOI decreases, the MEMS membrane structure will be bent and deformed under the action of atmospheric pressure, which will not only cause the deviation of the membrane thickness, but also cause local stress concentration on the MEMS membrane structure, which is serious and directly Cause the membrane structure to break or even fragment; Second, in the subsequent manufacturing process, due to the thin film thickness and local stress, when the MEMS membrane structure undergoes standard cleaning and drying in the process, high-pressure water flow and air flow can easily cause The MEMS film structure breaks or even fragments of the MEMS C-SOI wafer; third, due to the problem of local stress, the MEMS device made of the thinner MEMS film structure has poor long-term stability and is easily affected by the external environment. Testing and use bring a lot of inconvenience; fourth, for ultra-thin film structures (below 5um), it is necessary to use more expensive SOI wafers to bond with ordinary silicon wafers, which is costly, complicated, and difficult to implement; fifth, In the preparation of C-SOI wafers, the dielectric layer is grown on the substrate or grown on the substrate and the device layer at the same time, and the film structure and support structure of the C-SOI wafer will bulge around, which will affect the roughness of the SOI wafer. , it will cause the wafer to be unusable in severe cases

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