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Memory and method of forming the same

A memory and storage area technology, applied in semiconductor devices, electric solid state devices, electrical components, etc., can solve the problems of high dielectric layer breakdown voltage and high energy consumption of OTP memory programming, and achieve low programming voltage and reduced energy consumption. Effect

Active Publication Date: 2020-11-27
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Description
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Problems solved by technology

[0004] However, the breakdown voltage of the dielectric layer in the OTP memory of the prior art is relatively high, resulting in high programming energy consumption of the OTP memory.

Method used

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  • Memory and method of forming the same

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Embodiment Construction

[0035] There are many problems in the semiconductor structure in the prior art, for example: the breakdown voltage of the dielectric layer in the memory is relatively high, resulting in high energy consumption for programming the memory.

[0036] Combining with a kind of memory, the reasons why the high breakdown voltage of the middle medium layer of the memory in the prior art is analyzed, which leads to high programming energy consumption of the memory:

[0037] figure 1 It is a schematic diagram of the memory structure.

[0038] Please refer to figure 1 , the memory includes: a substrate 100, the substrate 100 includes an isolation region A and a storage region B located on both sides of the isolation region A; an isolation gate 121 located on the substrate 100 of the isolation region A; The selection gate 110 and the storage gate 120 located on the substrate 100 of the storage region B; the first source-drain doped region 113 and the second source-drain doped region 113 ...

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Abstract

The present invention provides a memory and its forming method, wherein the forming method includes: contacting the second source-drain plug with the projection of the storage plug on a plane perpendicular to the surface of the substrate, the A minimum distance between the second source-drain plug and the storage plug is smaller than a distance between the first source-drain plug and the selection gate. Wherein, since the distance between the storage plug and the second source and drain plug is small, the dielectric layer between the storage plug and the second source and drain plug is relatively thin, so that the storage plug and the second source and drain plug The dielectric layer between them is easy to be broken down, so that the programming voltage of the memory is lower, thereby reducing the energy consumption of the memory.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a memory and a forming method thereof. Background technique [0002] OTP (One Time Programmable, one-time programming) memory is a non-volatile memory that only allows one-time programming during use, so it has high data reliability. At present, OTP memory is mainly used for data such as initial information and key storage. There are two basic OTP memory cells, fuse type and antifuse type. Antifuse OTP memory has important applications in the field of memory due to its strong radiation resistance, high safety and high and low temperature resistance. [0003] The basic structure of the anti-fuse OTP memory cell consists of a dielectric layer with a high dielectric constant sandwiched between two conductive electrodes. When not programmed, the anti-fuse OTP memory is equivalent to a capacitor, the impedance between the upper and lower plates is very high, and...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/11568H10B43/30
CPCH10B43/30
Inventor 冯军宏
Owner SEMICON MFG INT (SHANGHAI) CORP
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