Power semiconductor device and manufacturing method of collector regions thereof
A technology for power semiconductors and manufacturing methods, applied in semiconductor/solid-state device manufacturing, semiconductor devices, circuits, etc., can solve the problems of unreachable p-type collector region, low activation rate of boron ions, affecting device performance, etc. Hole injection efficiency and drift region conductance modulation effects, effects of increasing carrier concentration, low on-state voltage drop and on-state loss
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Embodiment 1
[0038] A power semiconductor device includes a semiconductor substrate or a semiconductor substrate with an n-type buffer layer formed on the back of the semiconductor substrate, a first p-type collector region, and a second p-type collector region, the first p-type collector region is passed through Formed by boron implantation on the back side of the semiconductor substrate, the second p-type collector region is formed by implanting aluminum on the back side of the semiconductor substrate, counting from the back side of the semiconductor substrate, the peak position of the aluminum implantation is higher than that of the boron implantation The peak position is shallow, and the peak concentration of the aluminum implant is higher than the peak concentration of the boron implant. The power semiconductor device is a diode or an insulated gate bipolar transistor. A semiconductor substrate or a semiconductor substrate with an n-type buffer layer formed on the back of the semicond...
Embodiment 2
[0040] A method for manufacturing a collector region of a semi-power conductor device, characterized in that: comprising the steps of:
[0041] Step 1, performing boron ion implantation on the back side of the semiconductor substrate;
[0042] Step 2, annealing the semiconductor substrate after boron ion implantation to form a first p-type collector region;
[0043] Step 3, performing aluminum ion implantation on the back side of the semiconductor substrate;
[0044] Step 4, performing annealing treatment on the semiconductor substrate after the aluminum ion implantation to form a second p-type collector region.
[0045] The implantation energy of boron in the first p-type collector region is 10KeV-400KeV.
[0046] The implantation dose of boron in the first p-type collector region is 1E13cm -2 ~5E15 cm -2 .
[0047] The annealing activation after boron implantation is performed by thermal annealing or laser annealing less than or equal to 500°C.
[0048] The implantatio...
Embodiment 3
[0054] Figure 1 to Figure 7 An embodiment of the present invention is shown. Such as figure 1 As shown, the semiconductor device is an IGBT, and the semiconductor substrate includes a front structure of the device IGBT and an n-type drift region 101 . The formed front structure includes n-type emitter region 102 , p-type base region 103 , trench gate 104 , gate oxide 105 , insulating layer 106 and front metal electrode 107 . The manufacturing method of the back collector area is the technical feature of the present invention. Specific steps are as follows:
[0055] Step 1. If figure 2 As shown, the ion implantation of the first p-type collector region on the back is carried out, and boron (B) implantation is used. The implantation energy of boron ions is 10KeV-400KeV, for example, it is set as 20KeV-50KeV. The implantation dose of boron ions is 1E13cm -2 ~5E15 cm -2 , for example set to 1E13cm -2 ~2E15 cm -2 .
[0056] Step 2. If image 3 As shown, the semiconduc...
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