Thin silicon-on-insulator (SOI) lateral insulator gate bipolar transistor (LIGBT) with folded groove gate

A folded groove and gate structure technology, applied to electrical components, circuits, semiconductor devices, etc., can solve the problems of long thermal process, large forward conduction voltage drop, large thermal budget, etc., and achieve high saturation operating current, small conduction The effect of low pass loss and low thermal budget

Inactive Publication Date: 2019-06-14
UNIV OF ELECTRONIC SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The traditional thin SOI LIGBT utilizes the lateral variation doping technique (Lateral Variation Doping Technique) of the top layer silicon to achieve lateral high voltage resistance, such as figure 1 As shown, the thermal process of this process is long and the thermal budget is extremely large; moreover, due to the thin top layer silicon and the existence of carrier recombination at the silicon-oxygen interface, the SOI

Method used

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  • Thin silicon-on-insulator (SOI) lateral insulator gate bipolar transistor (LIGBT) with folded groove gate
  • Thin silicon-on-insulator (SOI) lateral insulator gate bipolar transistor (LIGBT) with folded groove gate
  • Thin silicon-on-insulator (SOI) lateral insulator gate bipolar transistor (LIGBT) with folded groove gate

Examples

Experimental program
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Effect test

Embodiment 1

[0028] Such as figure 2 A kind of thin SOI LIGBT with folded groove gate is shown, comprising a substrate layer structure 1 arranged from bottom to top along the vertical direction of the device, a buried oxide layer structure 2 and an N-type top semiconductor layer structure 3; the surface of the top semiconductor layer structure Forming an emitter structure, a gate structure, a second insulating dielectric trench structure 9 of different depths, and a collector structure; the emitter structure includes a P-type well region 4 distributed along the vertical direction of the device, and the P-type well region 4 The upper P-type heavily doped region 5 and N-type heavily doped region 6; the bottom of the P-type well region is not in contact with the buried oxide layer structure 2; the P-type heavily doped region 5 and N-type heavily doped region 6 are in contact with each other; the upper surfaces of the P-type heavily doped region 5 and the N-type heavily doped region 6 jointly...

Embodiment 2

[0035] Such as image 3 As shown, the difference between this example and Example 1 is that the N-type heavily doped region 6 in this example is of the same "concave" type as the trench gate, and the P-type heavily doped region 5 is viewed along the vertical direction of the device as "T" shaped and complementary to the folded slot gate. Its working mechanism is the same as that of Embodiment 1. The P-type heavily doped region 5 distributed in a "T" shape increases the hole collection area, shortens the hole circulation path, and improves the anti-latch-up capability of the device.

Embodiment 3

[0037] Such as Figure 4 As shown, the difference between this example and Example 2 is that the P-type heavily doped region 5 in this example extends along the vertical direction of the device and has the same depth as the P-type well region 4 . Its working mechanism is the same as that of Embodiment 2, and the P-type heavily doped region 5 extending in the vertical direction accelerates the hole extraction speed during turn-off, which can improve the turn-off speed and anti-latch-up capability.

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Abstract

The invention belongs to the technical field of a power semiconductor, and particularly relates to a thin silicon-on-insulator (SOI) lateral insulator gate bipolar transistor (LIGBT) with a folded groove gate. The thin SOI LIGBT is mainly characterized in that a non-equal deep dielectric groove and the folded groove gate are employed; during positive voltage resistance, a transverse electric fieldis modulated by the non-equal deep dielectric groove, and a uniformly-doped drift region bears high voltage; during positive conduction, air is prevented from flowing to an emitter by the dielectricgroove, the hole concentration of a drift region near to the emitter is improved, electron injection improvement effect is achieved, and the conduction voltage drop of the device is reduced; the concentration of the drift region near to one side of a collector is farther lower than the concentration of the drift region at one side of the collector of a traditional thin SOI layer linear doping device, and the injection efficiency of the collector is improved; the electrical conduction modulation effect of the device is improved, the positive conduction voltage drop is reduced, the channel density of the folded groove gate is improved, and the saturation current capability of the device is greatly improved. Compared with a traditional thin SOI LIGBT structure, the thin SOI LIGBT has the beneficial effects of lower positive conduction voltage drop and higher saturation current capability, and Von-Eoff is more excellent in difference.

Description

technical field [0001] The invention belongs to the technical field of power semiconductors, and relates to a thin SOI LIGBT (Lateral Insulator Gate Bipolar Transistor, lateral insulated gate bipolar transistor) with folded trench gates. Background technique [0002] LIGBT has the advantages of high MOSFET input impedance, simple driving, high current density and low conduction voltage of BJT devices, and is easy to integrate. Compared with LDMOS, it has higher current density and smaller conduction voltage drop. [0003] Compared with conventional bulk silicon technology, SOI technology avoids the problems of large leakage current and large turn-off loss of bulk silicon technology, and has high speed, low power consumption, high integration, small parasitic effect, good isolation characteristics, and latch-up effect. It is widely used in consumer electronics such as automotive electronics and switching power supplies due to its small size and strong radiation resistance. ...

Claims

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Application Information

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IPC IPC(8): H01L29/40H01L29/423H01L29/739
Inventor 罗小蓉樊雕李聪苏伟张科杨洋魏杰邓高强欧阳东法王晨霞
Owner UNIV OF ELECTRONIC SCI & TECH OF CHINA
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