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A gate drive circuit and gate drive technology, applied in static indicators, instruments, etc., can solve problems such as threshold voltage drift easily and gate drive circuit failure.
Active Publication Date: 2020-10-16
SHENZHEN CHINA STAR OPTOELECTRONICS SEMICON DISPLAY TECH CO LTD
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When a transistor works for a long time, especially for an Indium Gallium Zinc Oxide (IGZO) transistor, its threshold voltage (threshold voltage) is prone to drift, resulting in failure of the gate drive circuit
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[0019] In order to make the purpose, technical means and effects of the present invention clearer, the present invention will be further elaborated below in conjunction with the accompanying drawings. It should be understood that the embodiments described here are only some, not all, embodiments of the present invention, and are not intended to limit the present invention.
[0020] Please refer to figure 1 , which shows a schematic circuit structure diagram of a gate driving circuit according to an embodiment of the present invention. The gate drive circuit includes a plurality of cascaded gate drive units 1, and the gate drive unit 1 includes a pull-up unit 100, a pull-up control unit 200, a downlink unit 300, a pull-down unit 400, a pull-down sustain unit 500 and a bootstrap capacitor Cbt. In this embodiment, the first clock signal CK1 and the second clock signal CK2 are AC signals with opposite waveforms. Specifically, the second DC low voltage VGL2 is greater than the f...
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Abstract
Provided is a gate driving circuit comprising: a plurality of gate driving units 1, comprising: a pull-up control unit 200, which is connected to a first and a second nodes Q and N, a first clock signal CK1, a scan signal output terminal G(n), a current stage transmission signal output terminal Cout(n) and a previous stage transmission signal output terminal Cout(n-1); a pull-down maintenance unit 500, which is connected to the first and second nodes Q and N, a current stage feedback signal output terminal Out(n), a next stage feedback signal output terminal Out(n+1), the scan signal output terminal G(n), the current stage transmission signal output terminal Cout(n), a first DC high voltage VGH1, a first and second DC low voltages VGL1 and VGL2; a pull-up unit 100, which is connected to the first node Q, the second clock signal and the scan signal output terminal; a downstream unit 400, which is connected to the first node Q, the second clock signal CK2, a second DC high voltage VGH2, the current stage feedback signal output terminal Out(n), and the current stage transmission signal output terminal Cout(n); a pull-down unit 300, which is connected to the first and second nodes Q and N, the scan signal output terminal G(n), the next stage transmission signal output terminal Out(n+1), and the first and second DC low voltages VGL1 and VGL2; a bootstrap capacitor Cbt, one end of the bootstrap capacitor Cbt is connected to the first node Q, and the other end is connected to the scan signal output terminal G(n).
Description
technical field [0001] The present invention relates to the field of display technology, in particular to a gate drive circuit for a display panel. Background technique [0002] The gate driver on array (GOA) technology, that is, the row driving technology of the array substrate, is to manufacture the gate scanning driving circuit on the thin film transistor array substrate to realize the driving mode of progressive scanning. [0003] In a conventional gate driving circuit, the node QB is the gate point of the transistor that maintains the output signal at a low level. During the display period of a frame, the node QB is almost kept at a high potential, so that the transistor controlled by the node QB is always on. When a transistor works for a long time, especially for an Indium Gallium Zinc Oxide (IGZO) transistor, its threshold voltage (threshold voltage) tends to drift, resulting in failure of the gate drive circuit. [0004] Therefore, it is necessary to provide a gat...
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Patent Type & Authority Patents(China)
IPC IPC(8): G09G3/20
CPCG09G3/20G09G2310/0267
Inventor 薛炎
Owner SHENZHEN CHINA STAR OPTOELECTRONICS SEMICON DISPLAY TECH CO LTD
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