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Passive noise shaping successive approximation SAR analog-to-digital converter

A technology of analog-to-digital converter and noise shaping, applied in the direction of analog-to-digital conversion, code conversion, instruments, etc., can solve the problems of increasing comparator noise and unsatisfactory noise shaping effect

Active Publication Date: 2019-11-22
SOUTHEAST UNIV
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  • Application Information

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Problems solved by technology

However, this paper only implements first-order noise shaping, and KT / C noise and gain loss will be introduced when switching capacitors are used to sample the residual voltage. At the same time, the passive loop filter of this structure requires a multi-input pair-tube comparator , which increases the comparator noise, so the noise shaping effect is not very good

Method used

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Embodiment Construction

[0058] Embodiments of the present invention will be described below in conjunction with the accompanying drawings.

[0059] Such as image 3 As shown, the present invention has designed a kind of passive noise shaping successive approximation SAR analog-to-digital converter, comprising: three capacitive digital-to-analog converters CDAC (100~102), passive loop filter (103), comparator (104) and SAR logic circuit (105), wherein the three identical CDACs include a CDAC1 (100) required for normal SAR conversion and two auxiliary CDAC2 (101) for generating a SAR last cycle margin voltage and CDAC3(102). CDAC1(100) generates the margin voltage V of this cycle res (n), CDAC2 (101) and CDAC3 (102) alternately generate the margin voltage V of the previous cycle res (n-1). The upper plates of the three CDAC capacitor arrays are respectively connected to the input terminals of the passive loop filter (103), and the passive loop filter (103) composed of several switches and capacitor...

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Abstract

The invention discloses a passive noise shaping successive approximation SAR analog-to-digital converter. The analog-to-digital converter comprises three capacitive digital-to-analog converters (CDACs), a passive loop filter, a comparator and an SAR logic circuit, wherein the three identical CDACs comprise a CDAC1 required by normal SAR conversion and two auxiliary CDAC2 and CDAC3 used for generating a margin voltage of a previous period. Two interlaced CDAC2 and CDAC3 are added, and KT / C noise and gain loss introduced by passive margin sampling are removed. Wherein the CDAC1 generates the margin voltage Vres (n) of the current period, and the CDAC2 and the CDAC3 alternately generate the margin voltage Vres (n-1) of the previous period. And the passive loop filter carries out noise shapingon the margin voltage and suppresses in-band noise of the signal. And the comparator quantizes the analog output of the passive loop filter into a digital code, the digital code toggles the next capacitor switch in the CDAC through the SAR logic circuit until the conversion is finished, and all the digital codes are sequentially spliced together to serve as the output code of the SAR ADC, which is the same as that of the common SAR ADC. According to the invention, the second-order noise shaping effect can be realized, the signal in-band quantization noise and the comparator noise are effectively suppressed, and the signal-to-noise ratio and the spurious-free dynamic range of the SAR ADC are obviously improved.

Description

technical field [0001] The invention relates to a novel passive noise shaping successive approximation SAR analog-to-digital converter, belonging to the technical field of high-precision analog-to-digital converters. Background technique [0002] At present, analog-to-digital converters are mainly divided into two categories: Nyquist rate analog-to-digital converters and oversampling analog-to-digital converters. One of the most representative types of Nyquist rate ADCs is the Successive Approximation Register Digital to Analog Converter (hereinafter referred to as SAR DAC). SAR ADC mainly adopts digital logic unit structure, such as figure 1 As shown, so its structure is simple and has high power efficiency and speed, but due to the existence of comparator noise and DAC establishment error, the accuracy of SAR ADC is generally limited in the range of 8-12bits. Therefore, SAR ADCs are widely used in medium-speed and medium-precision fields. The most widely used oversampli...

Claims

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Application Information

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IPC IPC(8): H03M1/08H03M1/46
CPCH03M1/0854H03M1/08H03M1/466
Inventor 吴建辉张力振李红
Owner SOUTHEAST UNIV
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