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A Broadband Active Linear Equalizer Circuit with Adaptive Continuous-Time Linear Equalization

A linear equalizer and linear equalization technology, applied in baseband systems, electrical components, baseband system components, etc., can solve problems such as increasing circuit area, expand bandwidth, reduce circuit area and parasitic effects, and reduce the number of Effect

Active Publication Date: 2022-01-18
ETOWNIP MICROELECTRONICS BEIJING CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The traditional active linear equalizer circuit adopts the programmable source terminal negative feedback capacitor array structure, and the N-bit digital control signal is encoded by the thermometer and output 2 N -1-bit control signal, the negative feedback capacitor array at the source end is designed to be 2 N -One capacitor branch is connected in parallel, which increases the circuit area, introduces a large number of parasitic effects, and further limits the trade-off relationship between gain, bandwidth, power consumption and area, making the active linear equalizer circuit applied to high-speed serial data When transmitting, you have to sacrifice more power consumption and area in exchange for bandwidth and gain

Method used

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  • A Broadband Active Linear Equalizer Circuit with Adaptive Continuous-Time Linear Equalization
  • A Broadband Active Linear Equalizer Circuit with Adaptive Continuous-Time Linear Equalization
  • A Broadband Active Linear Equalizer Circuit with Adaptive Continuous-Time Linear Equalization

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Experimental program
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Embodiment 1

[0058] Such as figure 1 As shown, a broadband active linear equalizer circuit with adaptive continuous-time linear equalization, the input signal and output signal are transmitted in differential form, and the circuit structure adopts a differential CML (Current Mode Logic) structure. The input differential signal port is INP (non-inverting input terminal) / INN (inverting input terminal), and the output differential signal port is OUTP (non-inverting output terminal) / OUTN (inverting output terminal).

[0059] The circuit includes: input differential pair transistors NM1 and NM2, load resistors R1 and R2, tail current sources Isource1 and Isource2, source negative feedback resistor Rs, negative capacitance unit (Negccell), source negative feedback capacitor array (Varcapcell), control Voltage generating circuit (Vcntgen) and gating unit (Muxcell).

[0060] The gate terminal of the input differential pair transistor NM1 is connected to the INP terminal, the drain terminal is con...

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Abstract

The invention discloses a broadband active linear equalizer circuit for adaptive continuous time linear equalization. The active linear equalizer circuit includes: a first input differential pair tube and a second input differential pair tube, a first resistor and a second resistor , the first current source and the second current source, the negative feedback resistor at the source end, the negative feedback capacitor array at the source end connected in sequence, the gating unit, the control voltage generating circuit, the differential signal input port INP / INN and the differential signal output port OUTP / OUTN. The present invention adopts a differential structure with negative feedback resistors and capacitors at the source end, can compensate input signals within a wide bandwidth range, reduce intersymbol interference jitter, and reduce bit error rates. Effectively expand the bandwidth of the active linear equalizer circuit, alleviate the trade-off relationship among bandwidth, gain and power consumption, reduce the number of parallel branches of the negative feedback capacitor array at the source end, and reduce the influence of circuit area and parasitic effects.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a wideband active linear equalizer circuit for adaptive continuous time linear equalization. Background technique [0002] The transmission and reception channels of high-speed serial data will introduce many non-ideal factors in the signal transmission process, such as the inherent skin effect and dielectric loss of transmission media such as printed circuit board wiring, backplane wiring, and cables. The impact of these non-ideal factors will deteriorate with the increase of the serial data rate, causing the channel to exhibit low-pass characteristics in the frequency domain, attenuating the high frequency part of the serial data. In the time domain, it is manifested as inter-symbol interference (ISI, Inter-Symbol-Interference), which deteriorates the eye diagram performance of received serial data and increases the bit error rate (BER) of received data. For the sa...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L25/03H03D7/14
CPCH04L25/03006H03D7/1441H04L2025/03433
Inventor 徐震朱敏
Owner ETOWNIP MICROELECTRONICS BEIJING CO LTD
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