Semiconductor structure and forming method thereof

Abstract

The invention discloses a semiconductor structure and a forming method thereof, and the forming method comprises the steps: providing a substrate, forming a gate structure on the substrate, forming asource-drain doped layer in the substrate at two sides of the gate structure, forming an interlayer dielectric layer on the substrate exposed by the gate structure, and enabling the interlayer dielectric layer to cover the source-drain doped layer; forming a first contact hole exposing the source-drain doped layer in the interlayer dielectric layer; forming a metal layer at the bottom of the firstcontact hole; forming barrier layers on the metal layer at the bottom of the first contact hole and on the side wall of the first contact hole; after the barrier layer is formed, annealing the substrate, and converting the metal layer at the bottom of the first contact hole into a metal silicide layer; after annealing treatment, adopting reducing gas to carry out surface treatment on the barrierlayer; and after surface treatment, forming a contact hole plug in the first contact hole. The reducing gas adopted by the surface treatment can be subjected to reduction reaction with the oxide layermaterial on the surface of the barrier layer, so that the performance of the device is improved.

Description

technical field [0001] Embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular, to a semiconductor structure and a method for forming the same. Background technique [0002] In the semiconductor manufacturing process, after the semiconductor devices are formed on the substrate, it is necessary to use multiple metal layers to connect the semiconductor devices together to form a circuit. The metal layers include interconnect lines and contact hole plugs formed in the contact holes ( contact, CT), the contact hole plug in the contact hole is connected to the semiconductor device, and the interconnection line connects the contact hole plug on different semiconductor devices to form a circuit. For example, the contact hole plugs formed on the FinFET include contact hole plugs electrically connected to the gate structure, and contact hole plugs electrically connected to the source-drain doped layer. [0003] With the continuous d...

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Problems solved by technology

For example, the contact resistance between the contact hole plug and the source-drain doped layer increases, which leads to a decrease in the response speed of the device, a delay in the signal, and a decrease in the driving current, which in turn leads to the degradation of the performance of the semiconductor device.

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