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Multistage coupling gate tunneling field effect transistor and manufacturing method thereof

A technology of tunneling field effect and coupled gate, which is applied in the field of microelectronics, can solve problems such as device performance degradation, bipolar off-state leakage, and reliability degradation, so as to reduce device power consumption, increase switching speed, and improve reliability. Effect

Active Publication Date: 2020-04-24
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This kind of device has inherent defects in the structure, that is, there is a strong electric field peak at the edge of the gate near the drain when the device is working under negative pressure, which will cause serious bipolar off-state leakage problems and eventually lead to device performance degradation. Reliable performance decreases, power consumption increases

Method used

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  • Multistage coupling gate tunneling field effect transistor and manufacturing method thereof
  • Multistage coupling gate tunneling field effect transistor and manufacturing method thereof
  • Multistage coupling gate tunneling field effect transistor and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0050] Example 1: Manufacturing a multi-level coupled gate tunneling field effect transistor with one suspended plate and a suspended plate width of 1 nm

[0051] Step 1. Select silicon semiconductor material as substrate 1, such as image 3 a.

[0052] Step 2. Fabricate the body region 2 on the silicon substrate 1, such as image 3 b.

[0053] Using the molecular beam epitaxy technique on the silicon substrate 1, the epitaxy thickness is 5nm, and the in-situ doping concentration is 5×10 9 cm -3 The silicon semiconductor material is used to form the body region 2, wherein the process conditions used for epitaxy are: the degree of vacuum is less than or equal to 1.0×10 -10 mbar, the RF power is 150W, and the reactant uses high-purity silicon source.

[0054] Step 3. Make source area 3, such as image 3 c.

[0055] Make a mask on the body region 2 for the first time, use the mask to dope the concentration of 1×10 18 cm -3 P-type impurities to form a source region 3 with...

Embodiment 2

[0072] Embodiment 2: Fabricate a multi-level coupled gate tunneling field effect transistor with three suspended plates and a suspended plate width of 3 nm

[0073] Step 1. Select InN semiconductor material as substrate 1, such as image 3 a.

[0074] Step 2. Fabricate the body region 2 on the InN substrate 1, such as image 3 b.

[0075] Using molecular beam epitaxy on an InN substrate 1, the vacuum degree is less than or equal to 1.0×10 -10 mbar, the RF power is 150W, and the reactant is N 2 1. Under the process conditions of high-purity indium source, the epitaxial thickness is 30nm, and the in-situ doping concentration is 5×10 15 cm -3 The InN semiconductor material forms the body region 2 .

[0076] Step 3. Make source area 3, such as image 3 c.

[0077] Make a mask on the body region 2 for the first time, use the mask to use the ion implantation process on the left side of the body region 2 at an implant dose of 9×10 13 cm -2 , under the process condition of i...

Embodiment 3

[0097] Embodiment 3: Fabricate a multi-stage coupled gate tunneling field effect transistor with 5 suspended plates and a width of 5 nm.

[0098] Step A. Select InGaN semiconductor material as substrate 1, such as image 3 a.

[0099] Step B. Fabricate the body region 2 on the InGaN substrate 1, such as image 3 b.

[0100] Using molecular beam epitaxy on InGaN substrate 1, the epitaxy thickness is 50nm, and the in-situ doping concentration is 1×10 17 cm -3 The InGaN semiconductor material is used to form the body region 2, wherein the process conditions used for epitaxy are as follows:

[0101] Vacuum degree is less than or equal to 1.0×10 -10 mbar,

[0102] RF power is 150W,

[0103] The reactant adopts high-purity indium source, high-purity gallium source, N 2 .

[0104] Step C. Make source area 3, such as image 3 c.

[0105] Make a mask on the body region 2 for the first time, use the mask to dope the concentration of 1×10 20 cm -3 P-type impurities to form a...

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Abstract

The invention discloses a multistage coupling gate tunneling field effect transistor and a manufacturing method thereof. The invention discloses the multistage coupling gate tunneling field effect transistor. The problem of bipolar off-state electric leakage of an existing tunneling field effect transistor is mainly solved. A substrate (1) is arranged at the bottom. A source region (3), a body region (2) and a drain region (4) are sequentially arranged at the upper part of the substrate (1) from left to right. A drain electrode (5) is arranged at the right upper part of the drain region (4). Asource electrode (6) is arranged at the left upper part of the source region (3). A gate dielectric layer (7) is arranged above the body region (2). Multiple stages of coupling gates (8) which are distributed at intervals are arranged above the gate dielectric layer (7). A passivation layer (9) is arranged on the periphery of the source region (3), the drain region (4), the drain electrode (5), the source electrode (6), the gate dielectric layer (7) and multiple stages of coupling gates (8). According to the invention, the bipolar off-state electric leakage problem of the device is reduced; the switching speed of the device is improved; the power consumption of the device is reduced; the reliability of the device is improved; and the device can be applied to a low-power-consumption electronic system.

Description

technical field [0001] The invention belongs to the technical field of microelectronics, and particularly relates to a tunneling field effect transistor, which can be used in a low power consumption circuit system. [0002] technical background [0003] The rapid development of semiconductor technology has promoted the integration level of integrated circuit chips to double every 2 to 3 years, bringing about a huge leap in chip performance. However, with the further reduction of device size, the problem of static power consumption and switching power consumption of traditional MOSFET devices is becoming more and more significant, which cannot fully meet the requirements of future low power consumption applications and energy saving and environmental protection. As a new type of low-power semiconductor device that is expected to replace traditional MOSFET devices, tunneling field-effect transistors (TFETs) are based on quantum band-band tunneling mechanism, which can achieve s...

Claims

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Application Information

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IPC IPC(8): H01L29/739H01L29/08H01L29/10H01L21/331
CPCH01L29/0843H01L29/1025H01L29/66356H01L29/7391
Inventor 毛维何元浩高北鸾彭紫玲杜鸣马佩军张进成郝跃
Owner XIDIAN UNIV
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