Semiconductor device and forming method thereof

Abstract

The invention discloses a semiconductor device and a forming method thereof. The method comprises the following steps that: 1, a semiconductor substrate is provided, the semiconductor substrate is provided with a fin portion, wherein the fin portion has a first dummy gate structure and a second dummy gate structure respectively spanning the fin portion, wherein the first dummy gate structure covers a part of the top and the sidewall surface of the fin portion, and the second dummy gate structure covers a part of the top and the sidewall surface of the fin portion; a hard mask layer is formed on an interlayer dielectric layer, a first opening is formed in the hard mask layer, and the first opening exposes the top surface of the first dummy gate structure; and with the hard mask layer adopted as a mask, the first pseudo gate structure and the fin portion located at the bottom of the first pseudo gate structure are etched, so that a trench in the interlayer dielectric layer and the fin portion can be formed, and the etching rate of the hard mask layer to be smaller than that of a silicon nitride material in an etching process of forming the trench. The semiconductor device formed by the method is good in performance.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor device and a forming method thereof. Background technique [0002] With the improvement of the integration level of semiconductor devices, the critical dimensions of transistors are continuously reduced, and the design of three-dimensional structures such as fin field effect transistors (Fin FETs) has become a hot spot in this field. Fin Field Effect Transistor (Fin FET) is an emerging multi-gate device. Fin FET generally has a plurality of thin fins extending vertically upward from the substrate, and the channel of Fin FET is formed in the fins. A gate structure is formed on the fin, an active region and a drain region are formed in the fins on both sides of the gate structure, and adjacent fins are isolated by an isolation structure. [0003] With the continuous miniaturization of devices, in order to produce smaller and denser fins, new tec...

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Problems solved by technology

[0004] It can be seen that the manufacturing process of the SDB isolation structure and its forming structure will affect the isolation performance of the SDB isolation structure, and even cause defects in the surrounding fin and gate structures, thereby affecting the performance of the Fin FET device.

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