Anti-radiation RS code decoding circuit
A decoding circuit and anti-radiation technology, which is applied in the field of anti-radiation RS code decoding circuit, can solve the problems of inconsistent module control, low circuit reliability, and unequal running time, so as to improve reliability and stability, improve circuit performance, the effect of reducing the circuit area
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Embodiment 1
[0032] The invention discloses a radiation-resistant RS code decoding circuit, which uses a counter to generate all control signals, and the generation of the control signals is that the counter generates each fixed value. The centralized control method generates the start signal and reset signal of each module, and refreshes each module regularly. When the radiation-resistant RS code decoding circuit is applied in space, assuming that the counter is overturned by a single event and the count value jumps from n to m, then the counter will continue to count from m, and all the control signals generated are still synchronous, which will not cause decoding At the same time, the counter will continue to operate until the counter is cleared, and the initial state can be restored without ground remote control. In this way, there is only one frame of data decoding error, and then it will enter the normal decoding state, which improves the reliability of the circuit. Second, in space...
Embodiment 2
[0041] On the basis of the above-mentioned embodiments, the specific implementation of each main module in the anti-radiation RS code decoding circuit will be described below.
[0042] In this example, if figure 2 , the specific implementation of the adjoint calculation module is as follows: in the first clock cycle, the input message symbol r 207 and polynomial coefficients a 0 , r 207 and a 0 After multiplication, the syndrome S is output 0 The initial value of S 0 ’; second clock cycle, syndrome S 0 Initial value plus the second message symbol r 206 , then multiplied by a 0 , the output syndrome S 0 One iteration value S 0 "; and so on, at the 208th clock cycle, the syndrome S is obtained 0 the final value of . For other polynomial coefficients a 1 ~a 10 , using the above calculation method, the syndrome S is obtained respectively 1 ~S 15 the final value of . in, figure 2 dff0 ~ dff15 in represent 16 D flip-flops.
[0043] In this embodiment, because the f...
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