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Programmable fuse trimming circuit system for IO port multiplexing

A technology for trimming circuits and port multiplexing, which is applied to programmable logic circuit devices, reliability improvement and modification, logic circuit interface devices, etc., and can solve the problems of programming yield, high cost, and large chip area.

Pending Publication Date: 2020-10-27
佛山中科芯蔚科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Laser trimming has advantages in process compatibility, chip area and precision, but its cost is relatively high, it needs professional laser trimming equipment and harsh external environment to complete, and it is not easy to operate; diode trimming requires the support of many PAD ports, Occupies a large chip area; the cost of memory trimming mask is high, and the process compatibility is poor. If the amount of stored information is too small, it is not recommended for analog integrated circuits; fuse trimming includes metal fuse trimming, polysilicon fuse trimming Adjustment, electronic programmable fuse trimming, metal fuse trimming and polysilicon fuse trimming generally use high current blowing, similar to diode trimming, need many PAD port support, use probe PROBE to lead large The current is blown, once it is blown, it cannot be recovered, there is a problem of programming yield, and there are even cases where the fuse burns continuously

Method used

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  • Programmable fuse trimming circuit system for IO port multiplexing
  • Programmable fuse trimming circuit system for IO port multiplexing
  • Programmable fuse trimming circuit system for IO port multiplexing

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Embodiment Construction

[0101] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0102] The invention designs a novel programmable fuse trimming circuit system, which is based on the CSMC0.18um BCD technology and designed for the selection of the sensitivity function of the magnetic sensor and the elimination of the offset voltage. Considering factors such as process conditions, processing and testing costs, and trimming accuracy requirements, it was decided to design the fuse in the circuit. There are a total of 18 data bits, which are div...

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Abstract

The invention provides a programmable fuse trimming circuit system for IO port multiplexing. The system is composed of an SLEEP port input circuit, a programming pulse detection circuit, a reference and power-on reset circuit, a programming data decoding circuit, an array fuse reference reference circuit and N M-bit array fuse circuits. The programmable fuse trimming circuit system is irrelevant to the operation of the chip after completing one-time programming, so that the programming data transmission port is selected to be multiplexed with the SLEEP dormancy control port, pulse sequences with different amplitudes and pulse widths are transmitted to the SLEEP port input circuit, the pulse sequences are decoded into programming address signals, programming data signals and programming enable signals through the programming pulse detection circuit and the programming data decoding circuit, and the programmable fuse trimming circuit system has the advantages of being low in cost, programmable, high in reliability and capable of achieving IO port multiplexing.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a programmable fuse trimming circuit system for IO port multiplexing. Background technique [0002] With the development of integrated circuit CMOS, BICMOS, BCD technology and design technology and various product application requirements, the performance index of the circuit system is also getting higher and higher. However, in the process of integrated circuit manufacturing, the non-ideal factors of various processes will affect the performance indicators of the circuit system. These random errors are mainly manifested in the asymmetry of the current mirror, the absolute deviation of the resistance and capacitance, the temperature drift effect of the resistance and capacitance, the resistance Capacitance mismatch, transistor mismatch, input offset voltage, etc. The parasitic effects of the circuit system are generated in the production process of the chip level, wa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K19/0175H03K19/003
CPCH03K19/017581H03K19/017518H03K19/003H03K19/00307H03K19/00315
Inventor 陆友威陈岚
Owner 佛山中科芯蔚科技有限公司
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