Redox gridarene and synthesis method thereof, organic field effect transistor memory based on redox gridarene and preparation method thereof
A lattice aromatic hydrocarbon and memory technology, applied in the field of organic storage and information, can solve the problems of low storage density, high operating voltage, poor tolerance, etc., and achieve the effects of fast response operation, simple device structure, and cost reduction.
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Embodiment 1
[0045] The redox lattice arene of the present embodiment, wherein X is S; K is 4-octyloxybenzene; G 1 , G 2 It is ferroceneacetylene, and its specific molecular formula is as follows:
[0046]
[0047] synthetic route:
[0048]
[0049] Specific preparation method:
[0050] A series of reactions shown in the above-mentioned synthetic route obtains bisbromogridine, bisbromogridine (0.5g / 0.26mmol) and ferroceneacetylene (0.16g / 0.77mmol) add catalyst Pd (PPh) under the protection of nitrogen 3 ) 4 (0.03g / 0.024mmol), CuI (0.03g / 0.16mmol) and put the reaction device in a light-proof environment, then add Et2N / DMF=3mL / 3mL with nitrogen gas for 2h to dissolve the reactant at room temperature, and then Add 3mol / L (KF / K 2 CO 3 ) 2mL, put it into a 90°C oil bath, heat and stir for 6h. The combined organic phases were extracted with dichloromethane, dried over anhydrous magnesium sulfate, filtered, and the solvent was removed with a rotary evaporator. The crude product was th...
Embodiment 2
[0052] A kind of OFET memory structure of this embodiment, its structural diagram is as follows figure 1 ,include:
[0053] Heavy doped silicon substrate;
[0054] a gate electrode formed on the substrate;
[0055] a gate insulating layer covering the gate electrode;
[0056] a charge storage layer formed on the gate insulating layer;
[0057] an organic semiconductor layer formed on the charge storage layer; and
[0058] The source and drain electrodes on both sides of the channel on the surface of the organic semiconductor layer.
[0059] The substrate is generally made of highly doped silicon wafer, glass wafer or plastic PET.
[0060] In this embodiment, heavily doped silicon is used as the substrate and the gate electrode; silicon dioxide with a thickness of 50-300 nm is used as the gate insulating layer; the product compound 1 of Example 1 is used as the charge storage layer, and the thickness is 10-30 nm; A layer of pentacene with a thickness of 30-50nm is evapora...
Embodiment 3
[0062] In this embodiment, heavily doped silicon is used as the substrate and the gate electrode; 50 nm of silicon dioxide on the heavily doped silicon is used as the gate insulating layer; the product compound 1 of Example 1 is used as the charge storage layer, and its thickness is 20 nm, and then A layer of pentacene with a thickness of 50nm is vapor-deposited on the charge storage layer as an organic semiconductor layer; finally, gold is vapor-deposited on the semiconductor layer pentacene as a source-drain electrode.
[0063] During the experimental operation, the laboratory temperature was maintained at about 25°C and the humidity was 40%.
[0064] The memory of this embodiment, the specific preparation steps are as follows:
[0065] (1) Prepare redox lattice arene material solution, the solvent is selected as toluene, due to the solubility of redox lattice arene material, the redox lattice arene material and PS are blended at a mass ratio of 1:4 to obtain a blended mater...
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