Process for manufacturing metallized coating under wafer bump and coating structure thereof
A technology of under-bump metallization and manufacturing process, which is applied in the direction of metal material coating process, liquid chemical plating, superimposed layer plating, etc., and can solve the problems of electroless nickel plating, gold penetration, independent pad missing plating, and short circuit and other problems to achieve the effect of overcoming the constraints of line width and line spacing and the constraints of line conductivity
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[0044] In order to express the present invention more clearly, the present invention will be further described below in conjunction with the accompanying drawings.
[0045] see Figure 1-2 , a coating manufacturing process for wafer under-bump metallization provided by the present invention, the base material 11 in the process is silicon or silicon carbide semiconductor; the base material surface is provided with a conductive circuit area and a non-conductive area, and a conductive After the substrate surface of the circuit area is recessed downward, an inverted wafer bump is formed on the substrate surface of the conductive circuit area;
[0046] The specific steps of the metallization coating process under the wafer bump are as follows: figure 2 ,Specifically:
[0047] Step 1, forming the metal electrode 12: the wafer substrate is etched to leak the electrodes inside the wafer, and the metal electrode 12 is formed at the bottom of the protruding part of the wafer bump;
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