Multifunctional TSV structure and preparation method thereof

Abstract

The invention provides a multifunctional TSV structure and a preparation method thereof. The multifunctional TSV structure comprises a composite substrate, a groove, a capacitor and copper interconnection, wherein the composite substrate is internally provided with a through hole which is conducted up and down, the composite substrate comprises a substrate layer, the top of the substrate layer isprovided with a plurality of composite layers, and each composite layer comprises a germanium-silicon material layer and a silicon material layer; the groove is formed in the inner wall of the throughhole; the capacitor is arranged on the outer wall of the groove, and the capacitor completely fills the through hole; and the copper interconnection is arranged in the through hole and penetrates through the composite substrate, and the copper interconnection is arranged on the outer wall of the capacitor. The TSV structure not only can be used for quickly connecting a chip, but also has a high-density capacitor and can be used as an energy storage device, so that the performance of the TSV structure is effectively improved.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a multifunctional TSV structure and a preparation method thereof. Background technique [0002] With the rapid development of integrated circuit technology, microelectronic packaging technology has gradually become the main factor restricting the development of semiconductor technology. In order to realize the high density of electronic packaging, obtain better performance and lower overall cost, technicians have developed a series of advanced packaging technologies. Among them, three-dimensional packaging technology has good electrical properties and high reliability, and can achieve high packaging density at the same time, and is widely used in various high-speed circuits and miniaturized systems. Through Silicon Vias (TSV) technology is a new technology for interconnection of stacked chips in three-dimensional integrated circuits. By making many vertical interconn...

AI Technical Summary

Problems solved by technology

[0003] However, the currently prepared TSV structure is limited to serving as an interconnection channel between the upper and lower chips, and has no other functions.

Since the TSV structure has a larger aspect ratio, it has a larger specific surface area, which is a good substrate for preparing high-density capacitors, while the TSV structure in the prior art has a single function, and the prepared capacitor has a lower capacitance density.

Images