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Semiconductor device

A semiconductor, conductive type technology, applied in the direction of semiconductor devices, electrical components, circuits, etc., can solve problems such as the reduction of the withstand voltage of semiconductor devices

Pending Publication Date: 2021-03-19
KK TOSHIBA +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The withstand voltage of a semiconductor device sometimes decreases with the application of a voltage

Method used

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  • Semiconductor device
  • Semiconductor device
  • Semiconductor device

Examples

Experimental program
Comparison scheme
Effect test

no. 1 Embodiment approach

[0023] figure 1 It is a plan view showing the semiconductor device of the first embodiment.

[0024] figure 2 yes figure 1 The II-II section view.

[0025] exist figure 1 In , the semi-insulating layer 30, the insulating layer 31, the insulating layer 32, and the insulating portion 33 are omitted.

[0026] The semiconductor device 100 of the first embodiment is a diode. Semiconductor device 100 such as figure 1 and figure 2 As shown, there are semiconductor layer SL, lower electrode 21 (first electrode), upper electrode 22 (second electrode), EQuivalent-PotentialRing (EQPR, equipotential ring) electrode 23 (third electrode), semi-insulating layer 30, The insulating layer 31 , the insulating layer 32 and the insulating portion 33 .

[0027] The semiconductor layer SL has n - Type (first conductivity type) semiconductor region 1 (first semiconductor region), p-type (second conductivity type) semiconductor region 2 (second semiconductor region), n + Type EQPR region 3...

no. 2 Embodiment approach

[0108] Figure 9 It is a cross-sectional view showing a part of the semiconductor device according to the second embodiment.

[0109] The semiconductor device 200 of the second embodiment is a MOSFET. Such as Figure 9 As shown, compared with the semiconductor device 100, the semiconductor device 200 also has n + Type source region 6 (fourth semiconductor region) and gate electrode 15 .

[0110] p + Type contact area 5 and n + The p-type source region 6 is selectively disposed above the p-type semiconductor region 2 . The gate electrode 15 faces the p-type semiconductor region 2 with the gate insulating layer 15 a interposed therebetween. exist Figure 9 In the example shown, the gate electrode 15 is also connected with n - type semiconductor region 1 part and n + Type source region 6 is opposite. For example, p-type semiconductor region 2, p + Type contact area 5, n + A plurality of source regions 6 and gate electrodes 15 are provided in the X direction, and each ...

no. 3 Embodiment approach

[0116] Figure 10 It is a cross-sectional view showing a part of the semiconductor device of the third embodiment.

[0117] The semiconductor device 300 is an IGBT. The semiconductor device 300 differs from the semiconductor device 200 in that instead of n + type contact region 4 with p + type collector region 7 (fifth semiconductor region) and n-type buffer region 8 . p + type collector region 7 is provided on the lower electrode 21 and n - Type semiconductor region 1 between. The n-type buffer region 8 is set at p + type collector region 7 with n - Type semiconductor region 1 between. The n-type impurity concentration in the n-type buffer region 8, ratio n - The n-type impurity concentration in the type semiconductor region 1 is higher than n + The n-type impurity concentration in the n-type source region 6 is low.

[0118] The operation of the semiconductor device 300 will be described.

[0119] In a state where a positive voltage is applied to the lower electro...

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Abstract

A semiconductor device capable of suppressing a decrease in withstand voltage due to application of a voltage is provided with a first electrode, first and third semiconductor regions of a first conductivity type, a second semiconductor region of a second conductivity type, a plurality of annular regions, a second electrode, a third electrode, and a semi-insulating layer. The second semiconductorregion is provided above the first semiconductor region. The third semiconductor region is provided above the first semiconductor region and surrounds the second semiconductor region. Each of the plurality of annular regions surrounds the second semiconductor region. The second electrode is provided above the second semiconductor region. The third electrode is provided above the third semiconductor region. The semi-insulating layer is in contact with the first semiconductor region, the second electrode, the plurality of annular regions, and the third electrode. The plurality of annular regionsinclude a first annular region and a second annular region provided between the first annular region and the third semiconductor region. The length of the second annular region in the radial direction is shorter than the length of the first annular region in the radial direction.

Description

[0001] Associate application [0002] This application enjoys the priority of the basic application based on Japanese Patent Application No. 2019-169390 (filing date: September 18, 2019). This application incorporates the entire content of the basic application by referring to this basic application. technical field [0003] Embodiments of the present invention relate to semiconductor devices. Background technique [0004] Diodes, Metal Oxide Silicon Field Effect Transistor (MOSFET, Metal Oxide Semiconductor Field Effect Transistor), Insulated Gate Bipolar Transistor (IGBT, Insulated Gate Bipolar Transistor) and other semiconductor devices are used for power conversion and other applications. The withstand voltage of a semiconductor device sometimes decreases with the application of a voltage. It is desirable that the amount of drop in withstand voltage caused by voltage application is small. Contents of the invention [0005] Embodiments of the present invention provid...

Claims

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Application Information

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IPC IPC(8): H01L29/06H01L29/861H01L29/78H01L29/739
CPCH01L29/0619H01L29/861H01L29/7813H01L29/7397H01L29/8611H01L29/0638H01L29/405H01L29/0692H01L29/1608H01L29/20H01L29/2003H01L29/7811H01L29/1095H01L29/0626H01L29/408H01L29/16
Inventor 吉川大辉
Owner KK TOSHIBA