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Chip embedded compound for electron beam exposure and preparation method and application thereof

A technology of electron beam exposure and composites, which is applied in the direction of circuits, electrical components, electrical solid devices, etc., can solve the problems of waste of lithography area, small chips cannot be directly spun glue, etc.

Active Publication Date: 2021-05-18
THE CHINESE UNIV OF HONG KONG SHENZHEN
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The purpose of this application is to provide a chip embedded compound for electron beam exposure and its preparation method and application, aiming at solving the problem that small chips in the prior art cannot be directly spun glue and used in the fixing process of electron beam exposure The problem of waste of photolithography area

Method used

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  • Chip embedded compound for electron beam exposure and preparation method and application thereof
  • Chip embedded compound for electron beam exposure and preparation method and application thereof
  • Chip embedded compound for electron beam exposure and preparation method and application thereof

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preparation example Construction

[0031] The first aspect of the embodiment of the present application provides a method for preparing a chip embedded composite for electron beam exposure, including the following steps:

[0032] S01. A composite structure is provided, wherein the composite structure includes a first substrate, a conductive layer disposed on a surface of the first substrate, and a chip array disposed on a surface of the conductive layer away from the first substrate;

[0033] S02. laying a protective layer on the outer surface of the chip array, and the protective layer covers the chip array;

[0034] S03. Encapsulating and curing the composite structure and the protective layer by using a polymer solution;

[0035] S04. Removing the protective layer to obtain a chip embedding compound.

[0036]The first aspect of the present application provides a method for preparing a chip embedded composite for electron beam exposure. The preparation method uses a composite structure including a chip as a ...

Embodiment 1

[0101] Chip-embedded compound for electron beam exposure and its preparation method

[0102] Preparation method of chip embedded compound

[0103] This preparation method comprises the steps:

[0104] Provide two unspun photoelectric semiconductor small chips (2mm*4mm), two (100) crystal orientation P or N-doped silicon wafers (8mm*10mm), a glass dish with a diameter of 60mm, 10ml PDMS solution A, 1ml PDMS liquid B (curing agent), ECA-1003 conductive adhesive, PMMA electronic adhesive. Required instruments: constant temperature hot plate, glue spinner, nitrogen gun, vacuum machine, step meter;

[0105] Such as Figure 5 As shown, a composite structure is provided, wherein the composite structure includes a first substrate, a conductive layer disposed on the surface of the first substrate, and a chip array disposed on the surface of the conductive layer away from the first substrate; Protective layer, the protective layer covers the chip array:

[0106] Use acetone and i...

Embodiment 2

[0116] Chip-embedded compound for electron beam exposure and its preparation method

[0117] Preparation method of chip embedded compound

[0118] This preparation method comprises the steps:

[0119] Provide two unspun photoelectric semiconductor small chips (2mm*4mm), two (100) crystal orientation P or N-doped silicon wafers (8mm*10mm), a glass dish with a diameter of 60mm, 10ml PDMS solution A, 1ml PDMS liquid B (curing agent), ECA-1003 conductive adhesive, PMMA electronic adhesive. Required instruments: constant temperature hot plate, glue spinner, nitrogen gun, vacuum machine, step meter;

[0120] A composite structure is provided, wherein the composite structure includes a first substrate, a conductive layer disposed on the surface of the first substrate, and a chip array disposed on a surface of the conductive layer away from the first substrate; a protective layer is laid on the outer surface of the chip array, A protective layer covers the array of chips:

[012...

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Abstract

The invention relates to the technical field of semiconductor chip manufacturing, and provides a preparation method of a chip embedded compound for electron beam exposure, and the preparation method comprises the following steps: providing a composite structure comprising a first substrate, a conductive layer arranged on the surface of the first substrate and a chip array arranged on the surface, deviating from the first substrate, of the conductive layer; laying a protective layer on the outer surface of the chip array, the protective layer covering the chip array; carrying out packaging and curing treatment on the composite structure and the protective layer by adopting a polymer solution; and removing the protective layer to obtain the chip embedded compound. According to the method, the photoetching area of the chip can be fully utilized, the small chip is used for spinning glue, and the method has the characteristics of low material cost, convenience in operation, short operation time, bottom surface conduction and the like, and is suitable for wide application.

Description

technical field [0001] The application belongs to the technical field of semiconductor chip manufacturing, and in particular relates to a chip embedded compound for electron beam exposure and its preparation method and application. Background technique [0002] The reason why optical pattern exposure (lithography) technology is widely used in the 21st century is that it has the characteristics of low cost, high yield, high resolution and easy operation. However, in order to meet the demands of IC process below 100nm, Electron Beam Lithography (EBL) is widely used in the semiconductor industry for next-generation VLSI. Its advantages are that it has a very good depth of focus, can correct large-scale height changes of the wafer, allows multiple design patterns to be fabricated together on a wafer, high automation and high precision control, etc. However, the yield of EBL equipment is low, about two wafers per hour when the resolution is less than 100nm. This yield is suitabl...

Claims

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Application Information

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IPC IPC(8): H01L21/027H01L21/56H01L23/29H01L23/31
CPCH01L21/0274H01L21/0273H01L21/56H01L23/3185H01L23/3171H01L23/293H01L21/561H01L21/568H01L23/3121
Inventor 张昭宇黄要然刘歌行李浩川
Owner THE CHINESE UNIV OF HONG KONG SHENZHEN
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