Micro-display driving chip structure and manufacturing process thereof
A technology for driving chips and micro-displays, applied in the manufacture of semiconductor/solid-state devices, electrical components, transistors, etc., can solve the problems of abnormal bright or dark pixel display, large MOSFET leakage current, unfavorable mobile portable applications, etc., to achieve utilization High, strong driving ability, expand the effect of mobile and portable applications
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Embodiment 1
[0044] Such as figure 1 As shown, the MOSFET module 2 includes a gate stack 21, a main spacer 22 and a source-drain region I
[0045] 23 , the main spacer 22 surrounds the gate stack 21 , and the source and drain regions I 23 are embedded in the monocrystalline silicon active region 4 and aligned on both sides of the main spacer 22 . The gate stack 21 includes a gate dielectric layer I211, a gate conductor layer I212 and a cap 213 arranged in sequence from bottom to top, and the gate dielectric layer I211 can be made of a common dielectric material (such as SiO 2 ) material, the gate conductor layer I212 is made of doped or undoped polysilicon material, and the cap 213 covering the gate conductor layer I212 can be made of insulating materials such as silicon nitride.
[0046] The polysilicon thin film transistor module 3 includes a source-drain region II31, a gate dielectric layer II32 and a gate conductor layer II33. The source-drain region II31 is arranged on both sides of ...
Embodiment 2
[0057] Such as image 3 As shown, the difference from the structure of the micro-display driving chip in Embodiment 1 is that a dielectric layer II10 is arranged above the MOSFET module 2 and the shallow trench isolation structure 5, and a polysilicon thin film transistor module 3 is arranged on the upper end of the dielectric layer II10, and the polysilicon thin film The upper end of the transistor module 3 is provided with a dielectric layer III11; the dielectric layer II10 and the dielectric layer III11 are provided with a plurality of via holes 8 opposite to the source-drain region I23 and the source-drain region II31, and the via holes 8 are filled with conductive metal , the upper end of the via hole 8 is deposited with a metal layer 9, which can electrically connect the MOSFET module 2 and the polysilicon thin film transistor module 3 according to the designed circuit. The material of the dielectric layer II10 and the dielectric layer III11 is the same as that of the di...
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