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SE diffusion method and obtained silicon wafer

A diffusion method and technology of silicon wafers, applied in the field of solar energy, can solve problems such as insufficient P concentration, poor ohmic contact of silicon wafers, high square resistance, etc., and achieve the effect of increasing P concentration, solving poor ohmic contact, and improving battery opening voltage and current

Active Publication Date: 2021-06-22
CSI CELLS CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

It solves the technical problem that the high square resistance of the existing SE diffusion process leads to insufficient P concentration in the PSG on the surface of the silicon wafer, and the high square resistance after laser doping, which eventually leads to poor ohmic contact in the heavily doped area of ​​the silicon wafer.

Method used

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  • SE diffusion method and obtained silicon wafer
  • SE diffusion method and obtained silicon wafer
  • SE diffusion method and obtained silicon wafer

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0057] A new SE diffusion process for increasing P concentration in PSG, including low-temperature boat feeding, stable temperature and pressure, low-temperature and low-pressure deposition, rapid heating and pressurization, high-temperature and high-pressure propulsion and oxidation, supplementary source deposition during cooling, low-temperature oxidation and low-temperature Steps to get out of the boat, the specific steps are as follows:

[0058] (1) Low-temperature boat feeding: put the textured polysilicon wafer into a diffusion furnace, set the temperature of the furnace tube at 770°C, and feed 3000ml / min of N 2 ;

[0059] (2) Stable temperature and pressure: control N 2 The flow rate is 3000ml / min, the temperature of the furnace tube is set to 790°C, and the pressure is 100mbar;

[0060] (3) Low temperature and low pressure deposition: 500ml / min O 2 , 500ml / min of N 2 -POCl 3 , set the furnace tube temperature to 790°C, the time to 16min, and the pressure to 100mba...

Embodiment 2

[0067] Except that step (6) sets the temperature of the furnace tube to 800° C., and sets the cooling time to 40 minutes so that the cooling rate is 1.5° C. / min, other methods and conditions are the same as in Example 1.

Embodiment 3

[0069] Except that in step (6) the furnace tube temperature is set to drop to 800° C., and the cooling time is set to 20 minutes so that the cooling rate is 3° C. / min, other methods and conditions are the same as in Example 1.

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Abstract

The invention discloses an SE diffusion method and an obtained silicon wafer, and relates to the technical field of solar cells. The method comprises the step of cooling deposition, wherein a phosphorus source is introduced in the cooling process, and a PSG layer grows. According to the SE diffusion process, the P concentration in PSG can be effectively increased through a mode of supplementing a phosphorus source in the cooling process, a good heavily doped region can be formed after laser doping, the problem of poor ohmic contact of a high-sheet-resistance selective emission electrode battery is solved, preparation of the high-sheet-resistance battery is facilitated, the open voltage and current of the battery are improved, and then the efficiency of the battery is improved.

Description

technical field [0001] The invention relates to the technical field of solar energy, and relates to an SE diffusion method and obtained silicon chips. Background technique [0002] In the current field of solar cell technology, the application of high-efficiency cell technology is constantly improving. For example, high-efficiency cells such as PERC have continuously improved their conversion efficiency. In the continuous stacking technology, one of them can be doped with laser to prepare selective emission. Electrode (SE) cells. [0003] The preparation of SE cells mainly has two characteristics: 1) the contact area between the metal grid line and the silicon wafer is a heavily doped area, which can form a good ohmic contact and improve the fill factor; 2) the light receiving area is a lightly doped area, which can improve Short-wave response, low surface concentration reduces the recombination of minority carriers, thereby increasing the open circuit voltage and short cir...

Claims

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Application Information

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IPC IPC(8): H01L31/18C30B31/06
CPCH01L31/182C30B31/06Y02E10/546
Inventor 刘娜陈瑶刘运宇邓伟伟
Owner CSI CELLS CO LTD