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Enhanced GaN-based HEMT device

An enhanced and device technology, applied in semiconductor devices, electrical components, circuits, etc., can solve the problems of large fluctuations in the threshold voltage of devices, incomplete pinch-off of the channel, leakage, etc., to suppress the offset of the threshold voltage and ensure Surface morphology, cost reduction effect

Inactive Publication Date: 2021-12-17
SUZHOU UNIV OF SCI & TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Notched gate technology is a common technical means for GaN power devices to achieve enhanced operation, but the notched gate technology has a large fluctuation in the threshold voltage of the device, and the channel cannot be completely pinched off under zero bias, resulting in a small amount of leakage current.

Method used

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  • Enhanced GaN-based HEMT device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0055] The thickness of the GaN buffer layer in the test device is 4 μm, and the thickness of the GaN channel layer is 150 nm. The thickness of the AIN insertion layer is 1.2 nm, the thickness of the AlGaN barrier layer is 25 nm, and Al accounts for 30% of the total mass, GaN cap layer The thickness is 3 nm. When the etch parameter is 15W, the source power is 50W, CL 2 The flow rate is 4SCCM, BCL 3 The flow rate is 10sccm. The thickness of the AIN interface protective layer and the insulated gate dielectric layer is 4 nm and 14 nm, respectively, and the drain voltage is biased to 0.1V. The Ti / Al / Tin alloy was sputtered using a magnetron sputtering instrument, and the thickness of each layer was 25 / 150 / 100 nm, respectively, and the annealing temperature was 500 degrees Celsius, and the annealing time was 30 seconds.

[0056] Measure the maximum field effect mobility of this embodiment is 201cm 2 / V · S, when leakage current reaches 10 -3 When MA / mm, the threshold offset volt...

Embodiment 2

[0058] Relative to Examples, this embodiment has no AIN interface protective layer, reference Image 6 Described that the LPCVD high temperature process has adverse effects on the etching interface below the gate electrode, increasing the roughness of the surface of the sample, and by 93 cm by the 2Deg mobility 2 / V · S, below the Example 1, indicating that the LPCVD high temperature process causes degradation of the device 2DEG mobility.

[0059] When the leakage current reaches 10 -3 When the MA / mm, the threshold offset voltage is 0.15V, indicating that due to the lack of a AIN interface protection layer, the embodiment has the maximum threshold voltage offset, indicating that the high-temperature LPCVD process will produce high-density traps at the etching interface. Electron, causing the trap concentration faced from the device etching, suppressing the offset of the threshold voltage.

[0060] The breakdown voltage of this embodiment is 401V, which is lower than the embodime...

Embodiment 3

[0062] refer to Figure 7 However, with respect to the exempted terminal, the breakdown voltage 243V, with respect to the embodiment one, the slot terminal can alleviate the electric field concentration, improve the average electric field strength of the device and increase the breakdown voltage.

[0063] Therefore, the present invention etch the tank terminal structure while the groove gate structure is etched, so that at least the groove terminal structure retains at least 10 nm AlGa barrier layers to ensure that there is still a high concentration 2deg, and passed the test It is found that the tank terminal can alleviate the electric field concentration, improve the average electric field strength of the device and increase the breakdown voltage. By increasing the AIN interface protective layer and the insulated gate dielectric layer, the surface morphology is ensured, and the AIN interface protective layer can suppress the offset of the threshold voltage. By making the source e...

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Abstract

The invention provides an enhanced GaN-based HEMT device. The enhanced GaN-based HEMT device comprises a P-type substrate, a GaN buffer layer, a GaN channel layer, an AIN insertion layer, an AlGaN barrier layer and a GaN cap layer, and further comprises a groove gate structure, a source electrode, a drain electrode and a gate electrode, wherein the source electrode and the drain electrode are manufactured at the two ends of the upper surface of the AlGaN barrier layer, and the gate electrode is manufactured in the groove gate structure. According to the invention, the AlGaN barrier layer of at least 10 nm is reserved below the groove terminal structure so as to ensure that high-concentration 2DEG still exists below the groove terminal structure, tests find that the groove terminal can relieve the electric field concentration effect, the average electric field intensity of the device is improved, and the breakdown voltage is increased; by adding the AIN interface protection layer and the insulating gate dielectric layer, the surface morphology is ensured, and tests find that the AIN interface protection layer can restrain offset of threshold voltage; and when the source electrode and the drain electrode are manufactured, common Au is eliminated, and the low-temperature gold-free source and drain electrode is realized through proper thickness, temperature and time, so that the cost is reduced.

Description

Technical field [0001] The present invention relates to the field of semiconductor devices, particularly to an enhancement mode GaN-based HEMT devices. Background technique [0002] GaN-based HEMT devices are made by the process similar metal semiconductor field effect transistor can be formed at the heterojunction of two-dimensional electron gas (2DEG), the main conductance between the source and drain which is provided by the 2DEG conduction channel. [0003] The method for enhanced GaN-HEMT device has a recess gate technology, fluorine ion implantation technology. Recessed gate technology is commonly used techniques GaN power devices for enhanced operation, but there is a big technical devices recess gate threshold voltage fluctuation, the channel at zero bias state not fully pinched off, in a small amount of leakage current. [0004] Thus, the need for a new enhanced GaN-based HEMT device, to solve the above problems. Inventive content [0005] For the shortcomings of the pr...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/06H01L29/423H01L29/20H01L29/778
CPCH01L29/0611H01L29/42316H01L29/2003H01L29/778
Inventor 陈丽香孙云飞孙佳惟阙妙玲吴靖刘传洋
Owner SUZHOU UNIV OF SCI & TECH