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Semiconductor device and forming method thereof

A semiconductor and device technology, which is applied in the field of semiconductor devices and their formation, can solve the problem that the electrical performance of GAA structure MOSFET needs to be improved, and achieve the effects of low power consumption, improved quality and good performance

Pending Publication Date: 2022-01-07
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] However, in the prior art, the electrical performance of the GAA structure MOSFET still needs to be improved

Method used

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  • Semiconductor device and forming method thereof
  • Semiconductor device and forming method thereof
  • Semiconductor device and forming method thereof

Examples

Experimental program
Comparison scheme
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no. 1 example

[0031] Figure 4 to Figure 17 It is a structural schematic diagram of the formation process of a semiconductor device according to the first embodiment of the present invention.

[0032] Please refer to Figure 4 , providing a substrate 200 .

[0033] In this embodiment, the material used for the substrate 200 is single crystal silicon.

[0034]In other embodiments, the substrate 200 may also be polysilicon or amorphous silicon. In other embodiments, the material of the substrate 200 can also be semiconductor materials such as germanium, silicon germanium, gallium arsenide, silicon-on-insulator (SOI), germanium-on-insulator (GOI), or elements of group III-V. Multiple semiconductor materials, including: InP, GaAs, GaP, InAs, InSb, InGaAs or InGaAsP, etc.

[0035] Please refer to Figure 5 with Image 6 , Figure 5 yes Image 6 top view of Image 6 yes Figure 5 In the schematic cross-sectional view along line A-A, several fins arranged in parallel are formed on the su...

no. 2 example

[0119] Figure 18 It is a schematic structural view of the formation process of a semiconductor device according to the second embodiment of the present invention.

[0120] The difference between this embodiment and the first embodiment is only that the barrier layer is filled in the groove, and the sidewall of the barrier layer is flush with the sidewall of the second sidewall 210 .

[0121] The process from providing the substrate 200 to forming the groove 216 is the same as the first embodiment, please refer to Figure 4 to Figure 11 .

[0122] Please refer to Figure 18 , the barrier layer 226 is formed in the groove 216 , and the barrier layer 226 fills up the groove 216 .

[0123] In this embodiment, the barrier layer 226 is made of a low-k (dielectric constant) material, including at least one of SiOCN, SiOC, and SiON.

[0124] In this embodiment, the forming method of the barrier layer 226 includes: forming a first initial barrier layer on the sidewall and bottom s...

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Abstract

The invention discloses a semiconductor device and a forming method thereof. The semiconductor device comprises a substrate; a fin part which is located on the substrate, wherein the fin part comprises a first region, and the fin part in the first region comprises gate grooves and channel layers located between the adjacent gate grooves; and a gate structure which is located on the substrate, stretches across the fin part, covers the side wall and the top of the fin part in the first region, fills the gate groove and surrounds the channel layer, wherein the width of the gate structure located in the gate groove is less than that of the gate structure located at the top of the fin part in the first region. On the one hand, the width of the gate structure in the gate groove is small, namely the width of the gate structure of the control channel is small, so that the corresponding feature size is small, and the smaller the feature size is, the higher the integration level of the semiconductor device is, the better the performance is and the lower the power consumption is; on the other hand, the width of the gate structure at the top of the fin part in the first region is large, so that the filling difficulty of the gate structure in the forming process is reduced, and the quality of the finally formed gate structure is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor device and a forming method thereof. Background technique [0002] Metal-oxide-semiconductor field-effect transistor (MOSFET) is one of the most important elements in the modern integrated circuit, and the basic structure of MOSFET comprises: semiconductor substrate; Be positioned at the gate structure of semiconductor substrate surface, described gate structure comprises : a gate dielectric layer on the surface of the semiconductor substrate and a gate electrode layer on the surface of the gate dielectric layer; source and drain doped regions in the semiconductor substrate on both sides of the gate structure. [0003] With the development of semiconductor technology, the traditional planar MOSFET's ability to control the channel current becomes weaker, resulting in serious leakage current. Fin Field Effect Transistor (Fin FET) is an emerging ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/423H01L21/336
CPCH01L29/42356H01L29/66545H01L29/66803H01L29/785H01L29/6653H01L29/7848H01L29/165H01L29/267H01L29/775B82Y10/00H01L29/0673H01L29/66439H01L29/0847H01L21/28114H01L29/78696H01L29/42392H01L29/0665H01L29/4908H01L29/78618H01L29/66742H01L21/28088H01L29/66553H01L29/66636H01L21/0259
Inventor 王楠
Owner SEMICON MFG INT (SHANGHAI) CORP