Manufacturing method of semiconductor structure and semiconductor structure

Abstract

The invention provides a manufacturing method of a semiconductor structure and the semiconductor structure, and relates to the technical field of semiconductors. The manufacturing method of the semiconductor structure comprises the steps of providing a substrate; forming a plurality of silicon columns on the substrate, wherein the plurality of silicon columns are arranged in an array; pre-processing the silicon column to form an active column which comprises a first section, a second section and a third section; forming a first gate oxide layer on the side walls of the second section and the third section; a second gate oxide layer is formed on the first gate oxide layer, the length of the second gate oxide layer is smaller than that of the first gate oxide layer, and the thickness of the second gate oxide layer is larger than that of the first gate oxide layer. According to the invention, the two gate oxide layers with different thicknesses are formed at different positions on the second section of the active column, and the thickness of the gate oxide layer formed on the third section is the same as that of the gate oxide layer at the thicker end of the second section, so that the leakage current of the drain electrode induced by the gate electrode is effectively reduced, and the performance and yield of the semiconductor structure are improved.

Description

technical field [0001] The present disclosure relates to the field of semiconductor technology, and in particular, to a method for manufacturing a semiconductor structure and the semiconductor structure. Background technique [0002] Dynamic random access memory (DRAM for short) is a semiconductor memory capable of writing and reading data at high speed and randomly, and is widely used in data storage devices or devices. Wherein, the DRAM includes a plurality of memory cells repeatedly arranged, and each memory cell includes a transistor and a capacitor, and the capacitor is connected to the source and drain of the transistor through a capacitive contact area and a capacitive contact structure. With the development of electronic products becoming lighter, thinner, shorter and smaller, the design of DRAM components is also developing towards the trend of high integration, high density and miniaturization. [0003] With the development of semiconductor technology, the size of...

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Problems solved by technology

[0003] With the development of semiconductor technology, the size of semiconductor devices is getting smaller and smaller, and problems such as Gate Induced Drain Leakage (GIDL) will have a greater adverse effect on the formation of semiconductor structures, reducing the performance of semiconductor structures. and yield

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