Integrated radar data acquisition and processing device based on server architecture

Abstract

The invention discloses an integrated radar data acquisition and processing device based on a server architecture, which comprises a case, and a data acquisition module, a real-time signal processing module, a data storage module and a display control computer which are integrated in the case, and is characterized in that the data acquisition module is used for acquiring radar echo data; the data storage module is used for storing the radar echo data; the display control computer is used for performing format analysis on the radar echo data to obtain radar parameters and echo data, and forwarding the radar parameters and the echo data to the real-time signal processing module; and the real-time signal processing module is used for performing real-time processing on the radar parameters and the echo data to obtain a target detection result. According to the invention, the functions of data acquisition, storage, signal processing, real-time display and control and the like are integrated in the integrated case, so that external field measured data acquisition and storage and internal field data playback can be realized, and rapid verification of a signal processing algorithm and an anti-interference algorithm can be realized in an internal field.

Description

technical field [0001] The invention belongs to the technical field of radar digital signal processing, and in particular relates to an integrated radar data acquisition and processing device based on a server architecture. Background technique [0002] With the rapid development of electronic technology, various new interference methods are emerging, which seriously affect the target detection and recognition performance of radar systems. In order to improve the target detection capabilities of radar systems in interference environments, research institutions in various countries have begun to develop new system radars. Various new anti-jamming algorithms are constantly proposed. However, the current anti-jamming algorithms all have the problems of large amount of calculation and high implementation complexity, and the signal processing process of the new system radar is more complicated than that of the traditional radar, which puts higher demands on the data processing ab...

AI Technical Summary

Problems solved by technology

However, the current anti-jamming algorithms all have the problems of large amount of calculation and high implementation complexity, and the signal processing process of the new system radar is more complicated than that of the traditional radar, which puts higher demands on the data processing ability and real-time performance of the radar signal processing system. requirements

[0003] At present, the signal processing units of radars in various countries mostly use the form of "FPGA (Field Programmable Gate Array) + DSP (digital signal processing, DSP)" to complete radar echo data preprocessing, anti-jamming, target detection and target detection. Information extraction, but the traditional signal processing architecture has the following deficiencies in the verification of new anti-jamming algorithms: First, the FPGA chip uses hardware description language programming, and the development of signal processing software is difficult and takes a long time. Rapid verification of new anti-interference algorithms; secondly, data transmission between DSP and FPGA mostly uses high-speed serial bus interface, data transmission is transmitted in the form of packets, and data transmission logic is complex; in addition, FPGA and DSP hardware resources and memory are small, It is difficult to meet the resource and memory consumption requirements of complex anti-jamming algorithms. Even if the resources and memory meet the requirements, the real-time performance cannot meet the requirements of radar applications.

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