Packaging structure and method of low-stress six-axis inertial sensor
An inertial sensor and packaging structure technology, applied in the direction of microstructure technology, microstructure devices, manufacturing microstructure devices, etc., can solve the problems of sensor output signal drift, cracks in the interface area of components, and change the resonant frequency of devices, etc., to achieve packaging process Easy to control, eliminate stress, and reduce the effect of contact area
Pending Publication Date: 2022-03-29
华天科技(南京)有限公司
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AI Technical Summary
Problems solved by technology
This traditional package has problems of large size and airtightness. More importantly, the organic substrate in contact with each other and silicon-based or lithium tantalate-based chips will generate greater packaging stress due to CTE mismatch, especially for For inertial sensing devices, such as three-axis accelerometers and three-axis gyroscopes, the structural geometric deformation and equivalent stiffness will change due to packaging stress, thereby changing the resonant frequency and quality factor (QF) of the device, resulting in The output signal of the sensor drifts
When the stress on the device is too large, it can also cause cracks, delamination and even failure of the component in the interface area, causing reliability and long-term stability problems
Method used
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[0046] Step 1: Use the RDL wiring process for the ceramic or heat-resistant glass of the buffer isolation layer, use solder ball Solder, copper pillars and other processes to form bumps, and weld the buffer isolation layer to the metal welding area of the substrate through the FC process. In order to realize the electrical connection between the ASIC chip and the substrate and the external circuit. The bump material is preferably a copper pillar (Cu pillar); the buffer isolation layer is preferably ceramics;
[0047] Step 2: If Figure 5 The three-axis gyroscope chip, the three-axis accelerometer chip and the ASIC chip of MEMS are bonded on the buffer isolation layer using low-stress adhesive film or adhesive glue; preferably low-stress adhesive film;
[0048] Step 3: If Figure 7 As shown in FIG. 2 , the MEMS and the ASIC chip, as well as the buffer isolation layer of the ASIC chip and the RDL wiring, are welded and interconnected by using a gold wire through a bonding pr...
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The invention provides a packaging structure and method for a low-stress six-axis inertial sensor. The packaging structure comprises a substrate, a buffer isolation layer, a three-axis accelerometer chip, an ASIC chip, a three-axis gyroscope chip, a plastic package body, gold threads, salient points, a bonding layer, a rewiring layer and a cavity structure. The buffer isolation layer is arranged on the substrate, the chip is arranged on the buffer isolation layer, the plastic package body is arranged on the surface of the substrate, and the buffer isolation layer and the chip are wrapped by the plastic package body; a rewiring layer is embedded in the buffer isolation layer; and salient points are arranged on the back surface of the buffer isolation layer. The packaged six-axis inertial sensor is higher in reliability, smaller in size and higher in integration level, the packaging process is easier to control, and mass production can be achieved.
Description
technical field [0001] The invention belongs to the technical field of semiconductor manufacturing, and in particular relates to a packaging structure and method for a low-stress six-axis inertial sensor. Background technique [0002] Inertial sensing components belong to micro-electro-mechanical systems (MEMS), which is a micro-device or micro-system that integrates mechanical components and drive components; including gyroscopes, accelerometers, temperature and humidity sensors, and magnetic field sensors Wait. The inertial sensor packaging process will introduce additional stress, which seriously affects the stability and reliability of the device. The packaging stress is caused by the mismatch of the coefficient of thermal expansion (CTE) between the device chip itself and the packaging material. Studies have shown that the die bonding process is the most important source of stress in packaging, especially due to the CTE mismatch between the chip substrate material and...
Claims
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Patent Timeline
Login to View More IPC IPC(8): B81B7/00B81C1/00B81B7/02
CPCB81B7/0048B81C1/00325B81C1/00301B81B7/007B81B7/02B81B2201/0228
Inventor 巫碧勤李鹏轩庞宝龙
Owner 华天科技(南京)有限公司