Control structure for isolating circuit in anti-fuse FPGA (Field Programmable Gate Array)

Abstract

The invention discloses a control structure for an isolating circuit in an anti-fuse FPGA (Field Programmable Gate Array), which belongs to the field of integrated circuits and comprises a control logic module, an oscillator, a charge pump, an inverter, a zero volt circuit, an NMOS (N-channel Metal Oxide Semiconductor) transistor HVN1 and a voltage stabilizing circuit, in the anti-fuse FPGA programming process, a zero-volt circuit is used for closing an isolation circuit, and high-low voltage isolation between high voltage for a programming path and low voltage for a user logic circuit is achieved; after programming of the anti-fuse FPGA is completed, the anti-fuse FPGA enters a user mode, the isolation circuit is started by a charge pump, an NMOS transistor HVN1 serving as a charge pump auxiliary charging module is opened while the charge pump is started, and the charge pump auxiliary charging module rapidly charges gate capacitor voltage of the isolation circuit to be close to the voltage value of a chip working power supply through the chip working power supply with high charging capacity.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a control structure used for isolation circuits in antifuse FPGAs. Background technique [0002] Antifuse FPGA is a highly reliable programmable gate array circuit, which has the advantages of non-volatility, low power consumption, high integration, and stable performance. It is widely used in military and aerospace fields with high reliability and high security. Due to its special application fields, such circuits abroad are often embargoed and technically blocked. [0003] Due to the important role of antifuse FPGA, research and technical research on key technologies including antifuse FPGA design technology, testing technology, programming method, and programmer design technology have been carried out in China. [0004] The invention provides a control structure applicable to the isolation circuit in the antifuse FPGA. Contents of the invention [0005] The pur...

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Problems solved by technology

[0005] The object of the present invention is to provide a kind of control structure that is used for the isolation circuit in the antifuse FPGA, solves the isolation between high and low voltage in the antifuse FPGA programming process Protected signal control issues to improve the reliability of the antifuse FPGA; in user mode, improve the response speed of the chip after the system is powered on

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