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P-type PIN diode adopting InGaN and preparation method thereof

A PIN diode and diode technology, applied in the field of electronic devices, can solve the problems affecting the performance of GaNPIN diodes, difficult to achieve high-quality heavy doping, low effective doping concentration, etc., to improve device performance, reduce number, and high hole concentration. Effect

Pending Publication Date: 2022-05-13
XIDIAN UNIV
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  • Application Information

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Problems solved by technology

The P-type layer of this structure uses Mg as the acceptor impurity to achieve heavy doping, but due to the deep energy level of the impurity, low activation rate and low material mobility, the effective doping concentration of GaN will be reduced. Low, it is difficult to achieve high-quality heavily doped P-type layer, which affects the performance of GaN PIN diodes

Method used

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  • P-type PIN diode adopting InGaN and preparation method thereof
  • P-type PIN diode adopting InGaN and preparation method thereof
  • P-type PIN diode adopting InGaN and preparation method thereof

Examples

Experimental program
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Effect test

Embodiment 1

[0068] Embodiment 1, the N-type layer is prepared on a sapphire substrate as a GaN layer and Al with a thickness of 5nm 0.2 Ga 0.8 5 layers of N are alternately arranged periodically, and the interlayer doping is 1×10 16 cm -3 , the layer-to-layer interface doping concentration is 1×10 20 cm -3 ; The intrinsic layer is Al whose composition coefficient x varies from 0 to 0.4, and linearly decreases from the N-type layer to the P-type layer. x Ga 1-x N layer with a thickness of 10 nm and a doping concentration of 1 × 10 14 cm -3 ; P-type layers are GaN layers with a thickness of 1 nm and In layers with a thickness of 10 nm 0.2 Ga 0.8 N is arranged alternately in 5 cycles, and In 0.2 Ga 0.8 The N layer is doped to a hole concentration of 1×10 17 cm -3 PIN diode.

[0069] Step 1, epitaxial growth of N-type multi-channel, such as Figure 4 (a)-4(d).

[0070] 1.1) Using the MOCVD method, epitaxially grow a layer with a thickness of 5 nm and a doped Si concentration of...

Embodiment 2

[0086] Example 2, the N-type layers are prepared on the Si substrate as a GaN layer with a thickness of 30 nm and an Al 0.3 Ga 0.7 The N layers are alternately arranged in 30 cycles, and the interlayer doping is 5×10 17 cm -3 , the layer-to-layer interface doping concentration is 1×10 20 cm -3 ; The intrinsic layer is Al whose composition coefficient x varies from 0 to 0.6, and linearly decreases from the N-type layer to the P-type layer. x Ga 1-x N layer with a thickness of 20 μm and a doping concentration of 5×10 15 cm -3 ; P-type layers are GaN layers with a thickness of 50 nm and In layers with a thickness of 500 nm 0.3 Ga 0.7 The N layers are alternately arranged in 4 cycles, and In 0.3 Ga 0.7 The N layer is doped to a hole concentration of 5×10 19 cm -3 PIN diode.

[0087] Step 1, epitaxial growth of N-type multi-channel, such as Figure 4 (a)-4(d).

[0088] 1a) Using the MOCVD method, a layer with a thickness of 20 nm and a doped Si concentration of 5 × 1...

Embodiment 3

[0104] Example 3, the preparation substrate is SiC, the N-type layer is a GaN layer with a thickness of 60 nm and an Al with a thickness of 40 nm 0.4 Ga 0.6 The N layers are arranged alternately in cycles, the number of cycles is 50, and the interlayer doping is 5×10 18 cm -3 , the layer-to-layer interface doping concentration is 1×10 20 cm -3 , the intrinsic layer is Al with a thickness of 100 μm and the composition coefficient x varies from 0 to 0.8, and linearly decreases from the N-type layer to the P-type layer. x Ga 1-x N layer with a doping concentration of 1×10 17 cm -3 , the P-type layer is a GaN layer with a thickness of 200 nm and an In layer with a thickness of 1 μm 0.4 Ga 0.6 The N layers are arranged alternately with a period of 5, and In 0.4 Ga 0.6 The N layer is doped to a hole concentration of 1×10 21 cm -3 PIN diode.

[0105] Step A, epitaxial growth of N-type multi-channel, such as Figure 4 (a)-4(d).

[0106] A1) Using the MOCVD method, a lay...

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Abstract

The invention discloses a P-type PIN diode adopting InGaN. The P-type PIN diode mainly solves the problem that the performance is low due to the fact that effective high doping is difficult to achieve in a P region of an existing GaN PIN diode. The device comprises a substrate (1), an N-type layer (2), an intrinsic layer (3) and a P-type layer (4) from bottom to top, and the N-type layer adopts an N-type multi-channel structure formed by periodically and alternately arranging GaN layers (21) and AlxGa1-xN layers (22) so as to obtain high-concentration electrons; the intrinsic layer adopts an Al < x > Ga < 1-x > N layer with gradually-changed Al components so as to obtain low-concentration carriers; the P-type layer is of a composite structure formed by alternately arranging a GaN insertion layer (41) and an In < x > Ga < 1-x > N layer (42) so as to obtain high carrier concentration. The growth quality of the In < x > Ga < 1-x > N layer is improved by introducing the insertion layer. And therefore, the performance of the device is improved, and the device can be applied to LED, microwave power and power electronic circuits.

Description

technical field [0001] The invention relates to the technical field of electronic devices, in particular to a PIN diode device, which can be used in LED, microwave power and power electronic circuits. technical background [0002] Due to the remarkable characteristics of large band gap, high breakdown field strength and high carrier mobility of third-generation semiconductors, LED devices, microwave devices, and power electronic devices prepared with third-generation semiconductor material gallium nitride have been produced. Huge advantage. At present, PIN is made of Si or GaAs material, which is limited by its material properties, and the operating frequency, withstand power, and response time reach the limit, so it is difficult to conduct high-power PIN diode research. This makes the study of high-power GaN PIN microwave diode technology an important direction to break through the bottleneck of current limiting technology. At present, most GaN PIN diode devices use a hig...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/15H01L29/20H01L29/205H01L29/207H01L29/868H01L21/329
CPCH01L29/157H01L29/155H01L29/2003H01L29/205H01L29/207H01L29/868H01L29/66219
Inventor 张进成刘蕙宁党魁张燕妮周弘宁静郝跃
Owner XIDIAN UNIV
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