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28results about How to "Increase hole concentration" patented technology

Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode

The invention discloses a light-emitting diode epitaxial wafer, a preparation method thereof and a light-emitting diode, and relates to the technical field of semiconductors. The light-emitting diode epitaxial wafer comprises a substrate, a buffer layer, an N-type semiconductor layer, a low-temperature stress release layer, a multi-quantum well light-emitting layer, an electron blocking layer and a P-type semiconductor layer. The multi-quantum well light-emitting layer comprises a first sub-layer, a second sub-layer, a third sub-layer and a fourth sub-layer which are stacked in sequence, and each of the first sub-layer, the second sub-layer, the third sub-layer and the fourth sub-layer comprises an InGaN quantum well layer and a GaN quantum barrier layer which are periodically and alternately stacked; an electron injection layer is inserted into at least one of the GaN quantum barrier layer of the first sub-layer, the GaN quantum barrier layer of the second sub-layer and the GaN quantum barrier layer of the third sub-layer; and a hole injection layer is inserted into the GaN quantum barrier layer of the fourth sub-layer. By implementing the invention, the electron hole matching degree of the multi-quantum well light-emitting layer can be improved, so that the luminous efficiency of the light-emitting diode is improved.
Owner:JIANGXI ZHAO CHI SEMICON CO LTD

Light-emitting diode epitaxial wafer, preparation method thereof and LED

The invention relates to the technical field of photoelectricity, and discloses a light-emitting diode epitaxial wafer and a preparation method thereof, and an LED, the light-emitting diode epitaxial wafer comprises a substrate, and the substrate is sequentially provided with a buffer layer, a non-doped GaN layer, an N-type GaN layer, a stress release layer, a multi-quantum well layer, an electron blocking layer, and a P-type GaN layer; the multi-quantum well layer comprises a high-barrier multi-quantum well layer, a middle-barrier multi-quantum well layer, a low-barrier multi-quantum well layer and a low-barrier end multi-quantum well layer which are stacked in sequence. According to the light-emitting diode epitaxial wafer provided by the invention, the hole injection efficiency of the P-type semiconductor material can be improved, the phenomenon of insufficient hole concentration in the multi-quantum well layer is improved, and the matching degree of electron hole concentration in the multi-quantum well layer is improved, so that the radiation recombination efficiency in the multi-quantum well layer is improved, and the brightness and the lighting effect of an LED device are finally improved.
Owner:JIANGXI ZHAO CHI SEMICON CO LTD

Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode

The invention discloses a light-emitting diode epitaxial wafer, a preparation method thereof and a light-emitting diode, and relates to the field of semiconductor photoelectric devices. The light-emitting diode epitaxial wafer sequentially comprises a substrate, a buffer layer, an intrinsic semiconductor layer, an N-type semiconductor layer, a multi-quantum well layer, an electron blocking layer and a P-type semiconductor layer. The P-type semiconductor layer comprises a Si3N4 layer, a first superlattice layer and a second superlattice layer which are sequentially stacked on the electron blocking layer, the first superlattice layer comprises a Mg-doped Al < x > Ga < 1-x > N layer and a Mg-doped GaN layer which are alternately stacked, and the second superlattice layer comprises a non-doped GaN layer and a Mg-doped In < y > Ga < 1-y > N layer which are alternately stacked. By implementing the invention, the luminous efficiency of the light-emitting diode can be improved.
Owner:JIANGXI ZHAO CHI SEMICON CO LTD

GaN-based LED epitaxial structure and preparation method thereof, and LED chip

According to the GaN-based LED epitaxial structure, the preparation method thereof and the LED chip provided by the invention, electron leakage is reduced through the electron blocking layer, and meanwhile, the hole injection layer comprising the thin AlN layer is adopted between the multi-quantum well layer and the electron blocking layer in the epitaxial structure, so that the barrier barrier height during hole transport can be reduced, and the hole transport efficiency can be improved. In addition, an effective path for hole tunneling is provided, energy during hole injection is increased, hole injection efficiency is remarkably improved, the concentration of holes injected into the multi-quantum well layer is increased, and then the luminous efficiency of the LED is improved.
Owner:LATTICE POWER (JIANGXI) CORP

Enhanced nitride semiconductor transistor structure

The invention relates to an enhanced nitride semiconductor transistor structure, which belongs to the technical field of semiconductors and comprises an epitaxial structure, the epitaxial structure comprises a substrate, a nucleating layer, a buffer layer, a channel layer, a barrier layer and a cap layer on the barrier layer, and a source electrode, a grid electrode and a drain electrode of the transistor structure are manufactured on the surface of the epitaxial structure. A cap layer on the barrier layer includes a polarized doped p-type nitride semiconductor structure, and an n-type nitride semiconductor structure thereover. According to the enhanced nitride semiconductor transistor structure, the p-type polarization doping structure is arranged in the cap layer, so that higher ionization charge and hole concentration compared with impurity doping can be realized, two-dimensional electron gas in the channel layer can be effectively exhausted, and meanwhile, the memory effect when Mg is doped with p-type nitride is avoided; a pn structure with a good interface is formed between the P-type polarization doping layer and the n-type layer above the P-type polarization doping layer, a commonly-used metal semiconductor Schottky contact grid electrode is replaced, the withstand voltage of the grid electrode is improved, and electric leakage of the grid electrode is reduced.
Owner:NINGBO GRAPHENE INNOVATION CENT CO LTD

Composite P-type bismuth telluride-based material and preparation method thereof

PendingCN122003089ALower lattice thermal conductivityimprove performanceBismuth tellurideLattice thermal conductivity
The invention belongs to the technical field of thermoelectric materials, and provides a composite P-type bismuth telluride-based material and a preparation method thereof in order to improve the thermoelectric performance of the thermoelectric materials, the composite P-type bismuth telluride-based material comprises a P-type bismuth telluride matrix with the chemical formula being Bi < 0.5 > Sb < 1.5 > Te < 3.2 > and a compound used for compounding, the chemical formula of the composite compound is selected from one or more of Cu2GeSe3, Ag8GeTe6 and Ag5Te3, and the chemical formula of the P-type bismuth telluride matrix is Bi < 0.5 > Sb < 1.5 > Te < 3.2 >. And the usage amount of the composite compound is 0.04-0.1% of the mass of the P-type bismuth telluride matrix. According to the P-type bismuth telluride-based composite material provided by the invention, crystal boundary, second phase and other defects are introduced after compounding to enhance phonon scattering, so that the lattice thermal conductivity is effectively reduced, and finally, the improvement of the material performance is realized by optimizing the carrier concentration and reducing the lattice thermal conductivity.
Owner:ZHEJIANG ADVANCED THERMOELECTRIC TECH CO LTD

Micro-led epitaxial structure

ActiveCN121510737Blow mobilityweaken piezoelectric fieldElectron holeQuantum well
This invention relates to the field of semiconductor optoelectronic devices, specifically disclosing a Micro-LED epitaxial structure, which sequentially comprises a substrate, a buffer layer, an N-type GaN layer, a stress relief layer, a first superlattice layer, an electron modulation layer, a light-emitting layer, a hole modulation layer, a second superlattice layer, and a P-type GaN layer; the stress relief layer includes In... α Ga 1‑α The N-layer and the first GaN layer; the first superlattice layer includes In. x Ga 1‑x N-layer and second GaN layer; electronic modulation layer includes Al a Ga 1‑a The light-emitting layer includes an N-layer and a third GaN layer, and the light-emitting layer includes an In layer. y Ga 1‑y N quantum well layer and quantum barrier layer, hole modulation layer including Al b Ga 1‑b N layers and In c Ga 1‑c N-layer, the second superlattice layer includes In z Ga 1‑z The N-layer and the fourth GaN layer have the following parameters: y > x > α, y > z, a ≥ b, and the number of periods in the light-emitting layer is ≤ 8. Implementing this invention can improve the luminous efficacy and luminous uniformity of Micro-LEDs at low current densities.
Owner:JIANGXI ZHAOCHI INTEGRATED TECHNOLOGY CO LTD +1

Preparation and biological activity application of hexagonal copper sulfide

The invention discloses an application of a hexagonal copper sulfide nano-platform with photo-thermal enhanced peroxidase activity in treatment of methicillin-resistant staphylococcus aureus infection so as to promote healing of infected wounds. An improved one-pot method is adopted to synthesize a hexagonal copper sulfide nano-sheet. Due to the fact that the hexagonal copper sulfide nanosheet shows good photothermal conversion efficiency and photothermal stability in a second near-infrared window and further shows excellent peroxidase-like activity, temperature rise caused by the photothermal effect of the hexagonal copper sulfide nanosheet remarkably amplifies the peroxidase-like activity of the hexagonal copper sulfide nanosheet. The hexagonal copper sulfide nanosheet plays a good biological catalytic antibacterial role in vitro, under photo-thermal irradiation, abscess fading and healing of in-vivo methicillin-resistant staphylococcus aureus infected wounds are promoted, and toxicity can be ignored. The copper sulfide nanosheet provides a feasible strategy for effectively treating a deep methicillin-resistant staphylococcus aureus infected wound by utilizing a synergistic treatment platform.
Owner:WENZHOU MEDICAL UNIV

Light emitting diode epitaxial wafer and preparation method thereof

The invention relates to the technical field of semiconductors, and particularly discloses a light-emitting diode epitaxial wafer and a preparation method thereof.The epitaxial wafer comprises a substrate and an epitaxial layer, the epitaxial layer comprises an active layer, an electron blocking layer and a P-type layer, and a hole injection layer is arranged between the active layer and the electron blocking layer; the hole injection layer comprises a first superlattice layer, a magnesium-carbon co-doped GaN composite layer and a second superlattice layer which are sequentially deposited in the epitaxial direction, the first superlattice layer is of a periodic structure formed by alternately stacking unintentionally-doped Mg AlGaN layers and low-doped Mg AlGaN layers, and the second superlattice layer is of a periodic structure formed by alternately stacking unintentionally-doped Mg GaN layers and high-doped Mg InGaN layers. The Mg doping concentration of the InGaN layer with high Mg doping is greater than the Mg doping concentration of the magnesium-carbon co-doped GaN composite layer, and the Mg doping concentration of the magnesium-carbon co-doped GaN composite layer is greater than the Mg doping concentration of the AlGaN layer with low Mg doping. Through mutual cooperation of multiple material layers, the self-compensation effect of Mg is effectively reduced, the concentration of activated Mg is improved, the hole concentration is improved, the effective hole injection efficiency is improved, and electron overflow is reduced, so that the radiation recombination efficiency of electrons and holes in the active layer is improved, and the luminous efficiency of the light-emitting diode is improved.
Owner:JIANGXI ZHAO CHI SEMICON CO LTD

Method for improving hole concentration in p-type compound semiconductor

PendingCN122094149AImprove conduction performanceImprove polarization characteristicsCrystallographyMaterials science
The invention discloses a method for improving hole concentration in a p-type compound semiconductor. Comprising the following steps: in the growth process of a p-type doped compound semiconductor epitaxial layer, co-doping and introducing a certain concentration of compensating impurity elements used for inhibiting intrinsic donor type point defects in a compound semiconductor; after growth of the p-type doped compound semiconductor epitaxial layer is completed, annealing treatment is carried out in a protective atmosphere containing non-metallic elements in the compound semiconductor; wherein the hole concentration of the epitaxial layer is improved through the combined action of the introduction of the compensating impurity element and the annealing treatment. According to the method disclosed by the invention, through a synergistic process of low-atomic-number same-family element doping and nitrogen-containing atmosphere annealing, synchronous improvement of the bulk material and the surface hole concentration is realized.
Owner:SUN YAT SEN UNIV

Low-loss IGBT (Insulated Gate Bipolar Translator) chip with compensation type floating P region and preparation method of low-loss IGBT chip

The invention belongs to the field of power semiconductor devices, and particularly discloses a low-loss IGBT chip with a compensation type floating P region and a preparation method of the low-loss IGBT chip. According to the invention, the N-CS layer is formed in the floating P region, the N-CS layer forms a hole barrier when the device is conducted, the hole concentration of the emitter side is increased by the floating P region, electron injection of the emitter side is enhanced in order to maintain electric neutrality, and the on-state voltage drop can be effectively reduced. In the switching process, the N-CS layer and the floating P region are mutually depleted, the expansion time of a depletion layer is shortened, and the switching time of the device is shortened. The switching loss can be reduced while the low on-state voltage drop of the device is maintained, and the on-state voltage drop and the switching loss are effectively balanced. An N-type layer is introduced into a floating P region, and the original maximum electric field is reduced due to positive charges provided by N-CS, so that the reduction of the electric flux of the traditional floating P region, the reduction of a concentrated high electric field near a groove, the protection of a gate oxide layer at the bottom of the groove and the improvement of the blocking voltage of the device are facilitated.
Owner:ZHEJIANG XINMENG SEMICON TECH CO LTD +1

P-type AlGaN material and preparation method thereof, and preparation method of ultraviolet photoelectronic device

ActiveCN119133328BIncrease hole concentrationimprove performanceElectron holePhysical chemistry
The present application relates to a p-type AlGaN material and a preparation method thereof, and a preparation method of an ultraviolet photoelectronic device, and belongs to the field of semiconductor technology. The preparation method of the p-type AlGaN material comprises: introducing an organic metal source and an N source at a first temperature to grow the p-type AlGaN material; pausing the introduction of the organic metal source and maintaining the temperature at a second temperature for a certain period of time to allow some Ga atoms in the p-type AlGaN material to escape, thereby generating cation vacancies in the p-type AlGaN material; wherein the second temperature is higher than the first temperature, and the difference between the second temperature and the first temperature ranges from 20°C to 200°C. Thus, the hole concentration of the p-type AlGaN material is increased.
Owner:SUZHOU LEKIN SEMICON CO LTD

Ga2O3 as the light absorption layer npn-type solar-blind ultraviolet detector and its preparation method

PendingCN122094198AWidely used valuehigh absorption coefficientUltraviolet lightsUltraviolet absorption
This invention relates to an npn-type solar-blind ultraviolet detector using Ga2O3 as the light-absorbing layer and its fabrication method. The detector, from bottom to top, comprises a GaN substrate, a CuI hole transport layer, a Ga2O3 solar-blind ultraviolet absorption layer, a Ti electrode layer, and an Au electrode layer. An In electrode layer is disposed on one side of the CuI hole transport layer on the GaN substrate. This invention uses n-GaN, which has high electron mobility, good thermal stability, and a mature fabrication process, as the bottom substrate; p-CuI, with high hole concentration, high mobility, and excellent p-type conductivity, and good energy level matching with n-GaN and subsequent materials, as the hole transport layer; and n-Ga2O3, with an ultrawide bandgap, high chemical stability, and a high absorption coefficient for solar-blind ultraviolet light, as the light-absorbing layer. Combining the low contact resistance of the bottom In electrode with the high contact area of ​​the top Ti / Au interdigitated electrode improves carrier collection efficiency.
Owner:HENAN UNIV OF SCI & TECH

Preparation method of GaN-based light-emitting diode epitaxial wafer and epitaxial wafer

The present disclosure provides a method for preparing a GaN-based light-emitting diode epitaxial wafer and an epitaxial wafer, belonging to the field of optoelectronic manufacturing technology. The method for preparing the GaN-based light-emitting diode epitaxial wafer includes: providing a substrate; epitaxially growing an n-type GaN layer on the substrate; epitaxially growing a multi-quantum well layer on the n-type GaN layer; intermittently introducing a Mg source into the reaction chamber in a pulsed manner to form a pretreatment layer on the multi-quantum well layer, wherein the pretreatment layer is a Mg metal layer; and epitaxially growing a p-type GaN layer on the pretreatment layer. The embodiments of the present disclosure can improve the problem of low doping concentration due to the memory effect of Mg when doping Mg in the p-type GaN layer, thereby improving the luminous efficiency of the light-emitting diode chip.
Owner:HC SEMITEK ZHEJIANG CO LTD

Method for preparing P-type tungsten diselenide field effect transistor through SbSx

PendingCN119132967AIncrease hole concentrationTransistorMaterial nanotechnologyDevice materialField effect
The invention discloses a method for preparing a P-type tungsten diselenide field effect transistor through SbSx, and belongs to the technical field of semiconductor devices. The device comprises a p-type doped silicon substrate, a silicon dioxide gate medium arranged on the p-type doped silicon substrate, a tungsten diselenide channel material arranged on the silicon dioxide gate medium, a source electrode and a drain electrode arranged on the surface of the tungsten diselenide channel material, and a SbSx modified film arranged on the surface of the tungsten diselenide channel material. According to the prepared p-type tungsten diselenide field effect transistor, the electrical performance of the field effect transistor can be improved, and further application of transition metal chalcogenide compounds in chip manufacturing in the future is facilitated.
Owner:GUANGXI UNIV

Ultrathin tunnel junction deep ultraviolet LED chip and manufacturing method thereof

ActiveCN119521865APromote activationIncrease hole concentrationEtchingUltraviolet
The invention discloses an ultrathin tunnel junction deep ultraviolet LED chip and a manufacturing method thereof, and the manufacturing method comprises the steps: preparing an epitaxial growth layer on a substrate, and the epitaxial growth layer comprises an AlN nucleating layer, an AlN buffer layer, a Si-doped n-AlGaN layer, a low-aluminum AlGaN / high-aluminum AlGaN multi-quantum well layer, a Mg-doped p-AlGaN electron blocking layer, and a Mg-doped p-AlGaN hole injection layer; the thickness of the Mg heavily-doped p < + >-AlGaN layer is 5-15 nm, and the thickness of the Si heavily-doped n < + >-AlGaN layer is 5-15 nm; partial etching is carried out on the Si heavily doped n < + >-AlGaN layer until the Si doped n-AlGaN layer is exposed; and respectively preparing an n electrode and a p electrode on the exposed Si doped n-AlGaN layer and the Si heavily doped n +-AlGaN layer to obtain the ultra-thin tunnel junction deep ultraviolet LED chip. According to the deep ultraviolet LED chip, the ultrathin n +-AlGaN / p +-AlGaN tunnel junction is adopted, the lightly doped n-AlGaN covering layer is removed, dehydrogenation activation of an Mg acceptor is facilitated, the working voltage of the deep ultraviolet LED chip is reduced, and the photoelectric property of the deep ultraviolet LED chip is improved.
Owner:WUHAN UNIV

Deep ultraviolet light emitting diode and preparation method thereof

The invention relates to a deep ultraviolet light-emitting diode and a preparation method thereof. The deep ultraviolet light-emitting diode sequentially comprises a substrate, a buffer layer, an n-type doped AlGaN layer, a multi-quantum well active layer, a first AlN insertion layer, a p-type electron blocking layer, a second AlN insertion layer, a p-type doped AlGaN layer and a p-type contact layer from bottom to top. Compared with a traditional AlGaN-based p-EBL structure, the structure that the thin AlN layers are inserted into the two sides of the p-EBL has the advantages that piezoelectric polarization is restrained to a low level, and the spontaneous polarization effect is reduced. In addition, the AlN insertion layer also improves the hole injection efficiency through in-band tunneling, and reduces the leakage of electrons in the active region to the p-type layer at the same time. The external quantum efficiency and the radiative recombination rate are remarkably improved, the photoelectric property of the AlGaN-based deep ultraviolet light-emitting diode is enhanced, and the rapid reduction of the efficiency attenuation effect is also inhibited.
Owner:SOUTH CHINA NORMAL UNIV

Germanium-silicon heterojunction npn type bipolar transistor and preparation method thereof

PendingCN121968609AReduce parasitic resistanceIncrease hole concentrationNoise (radio)Silicon oxide
The invention discloses a germanium-silicon heterojunction npn type bipolar transistor and a preparation method thereof, and relates to the technical field of semiconductors. According to the germanium-silicon heterojunction npn-type bipolar transistor and the preparation method thereof, the p-type heavily-doped polycrystalline silicon emitter region inner side wall is inserted between the n-type heavily-doped polycrystalline silicon emitter region and the L-shaped silicon oxide inner side wall, so that the hole accumulation state of a p-type connecting base region below the L-shaped silicon oxide inner side wall and adjacent to the L-shaped silicon oxide inner side wall can be caused or enhanced; and therefore, the hole concentration of the corresponding region can be increased, and the parasitic resistance of the corresponding connecting base region can be effectively reduced. The parasitic resistance of the connecting base region is reduced, so that the resistance of the parasitic base region of the germanium-silicon heterojunction npn type bipolar transistor can be reduced, the fmax can be improved under the condition of given fT, and the radio frequency noise coefficient can be effectively reduced; finally, the purpose of improving comprehensive device performance such as radio frequency power and noise of the germanium-silicon heterojunction npn type bipolar transistor serving as a radio frequency device is achieved.
Owner:SEMICON TECH INNOVATION CENT(BEIJING) CORP +1

IGBT (Insulated Gate Bipolar Translator) device capable of suppressing short-circuit oscillation and preparation method thereof

PendingCN119421425Areduce concentrationIncrease hole concentrationDevice materialMaterials science
The invention discloses an IGBT device capable of suppressing short-circuit oscillation and a preparation method, and relates to the field of semiconductor devices, and the IGBT device comprises a semiconductor substrate and an active region prepared in the central region of the semiconductor substrate; the semiconductor substrate comprises a first conduction type drift region, and the first conduction type is an N type; the active region comprises a plurality of cells which are distributed in parallel, and any cell comprises a plurality of carrier adjusting units; the carrier adjusting unit is located in the first conduction type drift region, so that the electron concentration in the first conduction type drift region is reduced, the hole concentration is increased, and the IGBT device can effectively suppress the short-circuit oscillation phenomenon.
Owner:GUIZHOU XINCHANGZHENG TECH CO LTD +1

Algan-based deep ultraviolet light emitting diode and preparation method thereof

ActiveCN116978998BIncrease hole concentrationReduce hole barrier height
The application relates to an AlGaN-based deep ultraviolet light emitting diode and a preparation method thereof, and belongs to the technical field of semiconductor photodiodes. From bottom to top, the AlGaN-based deep ultraviolet light emitting diode comprises a substrate, a buffer layer, an n-type semiconductor electron injection layer, a multi-quantum well active layer, a p-type electron blocking layer, an interface barrier regulation layer, a p-type semiconductor hole injection layer, a p-type contact layer, a p-type electrode and an n-type electrode. Negative polarization-induced charges are generated between the electron blocking layer / adjustment layer interface and the adjustment layer / hole injection layer interface, holes are gathered, an 'M'-shaped hole gathering area is formed between the electron blocking layer and the hole injection layer, meanwhile, the adjustment layer can reduce the valence band offset between the electron blocking layer and the hole injection layer, the interface barrier height between the two is reduced, more carriers can cross the electron blocking layer and enter the active area, and the problem of insufficient carrier injection of the DUV LED caused by the interface barrier of the electron blocking layer and the hole injection layer is solved.
Owner:SHANDONG UNIV +1

Preparation process of p-type beta-Ga2O3 film

The invention relates to the technical field of semiconductor material preparation, in particular to a preparation method of a p-type beta-Ga2O3 single crystal thin film, which utilizes pulsed laser deposition to prepare a gallium oxide thin film in a high oxygen pressure atmosphere, realizes great reduction of oxygen vacancy defect concentration in gallium oxide, reduces n-type carrier concentration increase caused by oxygen vacancy, and improves the yield of the gallium oxide thin film. The method has the advantages that the gallium oxide is doped with the nitrogen element, so that the p-type doping is difficult, the nitrogen element is guided to replace oxygen ions in gallium oxide crystal lattices under the action of the annealing atmosphere, the p-type conductive characteristic is formed, the hole concentration of the gallium oxide thin film is improved, and finally the high-quality beta-Ga2O3 thin film which is controllable in size and thickness and has p-type conductivity is obtained. By controlling the annealing time, the hole mobility of the thin film can reach up to 18 cm / V.s, and the hole concentration can reach up to 5.0 * 10 < 16 > / cm. The method is simple in process, low in manufacturing cost and suitable for industrial large-scale production, and important technical support is provided for research and development of high-performance power devices and deep ultraviolet detectors.
Owner:BEIJING GACHUANG HUAXIN TECHNOLOGY CO LTD

LED structure and preparation method thereof

The invention provides an LED structure and a preparation method thereof, the LED structure comprises an LED light-emitting unit, the LED light-emitting unit comprises a first semiconductor layer, a multi-quantum well layer, a second semiconductor layer and an ion implantation region surrounding the LED light-emitting unit, the first semiconductor layer, the multi-quantum well layer and the second semiconductor layer are stacked, and the material of the ion implantation region comprises the material of the LED light-emitting unit, passivation ions and stress regulation ions; the LED light-emitting unit is isolated by injecting passivation ions, side wall etching damage caused by an etching process and reduction of the efficiency of the LED light-emitting unit are avoided, the lattice constant of an ion injection region material is increased by injecting stress regulation and control ions, so that the ion injection region can apply pressure stress to the side wall of the LED light-emitting unit, and the service life of the LED light-emitting unit is prolonged. The wavelength of the LED structure is adjusted by applying the pressure stress, so that the wavelength uniformity of the LED structure is improved.
Owner:ENKRIS SEMICON (WUXI) LTD

Composite negative electrode material, preparation method thereof and lithium ion battery

The invention discloses a composite negative electrode material, a preparation method thereof and a lithium ion battery, and belongs to the technical field of batteries, the composite negative electrode material comprises a core body and a shell wrapping the core body, the core body comprises Fe-B co-doped Si with Si-Fe alloy attached to the surface, and the shell comprises an amorphous carbon layer with SiC growing on the surface. According to the composite negative electrode material, Fe-B is co-doped with Si to form a core body, and B doping can increase the hole concentration so as to improve the carrier mobility, so that the electron and ion transfer rate of silicon is improved, and the intrinsic conductivity and multiplying power of silicon are improved; meanwhile, the Si-Fe alloy phase, the amorphous carbon layer and SiC growing on the surface of the amorphous carbon layer are matched with one another, so that volume expansion of silicon during charging and discharging can be effectively inhibited, and a transmission channel for lithium ions is provided, so that the cycle performance and the rate capability of a lithium ion battery prepared from the silicon-based composite negative electrode material are improved.
Owner:ANHUI UNIVERSITY OF TECHNOLOGY +1

E-HEMT device preparation method and E-HEMT device

PendingCN119497409AIncrease the turn-on voltageImprove driving stabilityMaterials sciencePhysics
The invention provides an E-HEMT device preparation method, which comprises the steps of S1, providing a substrate, and forming a buffer layer on the upper side of the substrate; s2, sequentially arranging a channel layer and a barrier layer on the upper side of the buffer layer; s3, arranging a P-type doped layer on the upper side of the barrier layer; s4, forming a stress layer and a first electrode on the upper side of the P-type doped layer; and S5, preparing a second electrode and a third electrode in the first region. The invention further discloses the E-HEMT device corresponding to the preparation method of the E-HEMT device. According to the E-HEMT device provided by the invention, the turn-on voltage is remarkably improved, the driving stability of the device is good, the preparation steps of the preparation method of the E-HEMT device are simple, and the popularization of the E-HEMT device is facilitated.
Owner:RED & BLUE MICROELECTRONICS (SHANGHAI) CO LTD

Gallium nitride-based semiconductor laser element with hole expansion and injection layer

The invention discloses a gallium nitride-based semiconductor laser element with a hole expansion and injection layer, which sequentially comprises a substrate, a lower coating layer, a lower wave layer, a quantum well, an upper waveguide layer and an upper coating layer from bottom to top, and is characterized in that the hole expansion and injection layer is arranged between the upper waveguide layer and the upper coating layer; the descending angle from the peak position of the peak rate electric field of the hole expansion and injection layer to the direction of the upper coating layer is alpha, and the descending angle from the peak position of the peak rate electric field of the hole expansion and injection layer to the direction of the quantum well is beta, the descending angle of the peak position of the peak rate electric field of the upper coating layer towards the quantum well direction is gamma, wherein 30 degrees < = gamma < = beta < = alpha < = 90 degrees. The double functions of improving the hole injection efficiency and blocking electron overflow are achieved, the threshold current of the laser is reduced, and the slope efficiency and the limiting factor of the laser are improved.
Owner:ANHUI GAN SEMICONDUCTOR CO LTD

GaN-based light emitting diode epitaxial wafer and preparation method thereof, and GaN-based light emitting diode

The application discloses a GaN-based light-emitting diode epitaxial wafer and a preparation method thereof and a GaN-based light-emitting diode, and relates to the field of semiconductor photoelectric devices. The GaN-based light-emitting diode epitaxial wafer comprises a substrate and a nucleation layer, an intrinsic GaN layer, an N-type semiconductor layer, a multi-quantum well layer, an electron blocking layer and a P-type semiconductor layer arranged on the substrate in sequence; and the P-type semiconductor layer is a C / O co-doped P-type GaN thin film layer. By implementing the application, the brightness of the light-emitting diode can be improved, the anti-static capacity can be improved, and the surface roughness can be reduced.
Owner:JIANGXI ZHAO CHI SEMICON CO LTD

Semiconductor structure and forming method thereof

PendingCN119300386Areduce areaImprove gate reliabilityMOSFETSemiconductor structure
The invention provides a semiconductor structure and a forming method thereof, and the semiconductor structure comprises a semiconductor substrate, an epitaxial layer is formed on the surface of the semiconductor substrate, and a contact doping region is formed in the epitaxial layer; the shielding doped regions are located in the epitaxial layer on the two sides of the contact doped region, and the doping type of the shielding doped regions is opposite to that of the contact doped region; the well region is located in the epitaxial layer at the bottom of the contact doped region, the doping type of the well region is opposite to that of the contact doped region, and the depth of the shielding doped region is larger than that of the well region and larger than that of the contact doped region; the trench gate structures are located on the two sides of the shielding doped region and penetrate through part of the shielding doped region to be connected with the well region and the contact doped region, and the depth of the trench gate structures is larger than that of the well region and smaller than that of the shielding doped region. The MOSFET unit structure can solve the problems that an existing MOSFET unit structure is not high in reliability and low in integration level.
Owner:ALPHA POWER SOLUTIONS SHANGHAI LTD

P-type AlGaN material and preparation method thereof, and preparation method of ultraviolet electronic device

The invention relates to a p-type AlGaN material and a preparation method thereof, and a preparation method of an ultraviolet electronic device, and belongs to the technical field of semiconductors, and the preparation method of the p-type AlGaN material comprises the following steps: at a first temperature, introducing an organic metal source and an N source, and growing the p-type AlGaN material; stopping introducing the organic metal source, and keeping for a certain time at a second temperature to enable part of Ga atoms in the p-type AlGaN material to escape so as to generate cation vacancies in the p-type AlGaN material; wherein the second temperature is higher than the first temperature, and the difference between the second temperature and the first temperature ranges from 20 DEG C to 200 DEG C. Therefore, the hole concentration of the p-type AlGaN material is improved.
Owner:SUZHOU LEKIN SEMICON CO LTD