9results about How to "Increase hole concentration" patented technology

The invention belongs to the technical field of thermoelectric materials, and provides a composite P-type bismuth telluride-based material and a preparation method thereof in order to improve the thermoelectric performance of the thermoelectric materials, the composite P-type bismuth telluride-based material comprises a P-type bismuth telluride matrix with the chemical formula being Bi < 0.5 > Sb < 1.5 > Te < 3.2 > and a compound used for compounding, the chemical formula of the composite compound is selected from one or more of Cu2GeSe3, Ag8GeTe6 and Ag5Te3, and the chemical formula of the P-type bismuth telluride matrix is Bi < 0.5 > Sb < 1.5 > Te < 3.2 >. And the usage amount of the composite compound is 0.04-0.1% of the mass of the P-type bismuth telluride matrix. According to the P-type bismuth telluride-based composite material provided by the invention, crystal boundary, second phase and other defects are introduced after compounding to enhance phonon scattering, so that the lattice thermal conductivity is effectively reduced, and finally, the improvement of the material performance is realized by optimizing the carrier concentration and reducing the lattice thermal conductivity.

This invention relates to the field of semiconductor optoelectronic devices, specifically disclosing a Micro-LED epitaxial structure, which sequentially comprises a substrate, a buffer layer, an N-type GaN layer, a stress relief layer, a first superlattice layer, an electron modulation layer, a light-emitting layer, a hole modulation layer, a second superlattice layer, and a P-type GaN layer; the stress relief layer includes In... α Ga 1‑α The N-layer and the first GaN layer; the first superlattice layer includes In. x Ga 1‑x N-layer and second GaN layer; electronic modulation layer includes Al a Ga 1‑a The light-emitting layer includes an N-layer and a third GaN layer, and the light-emitting layer includes an In layer. y Ga 1‑y N quantum well layer and quantum barrier layer, hole modulation layer including Al b Ga 1‑b N layers and In c Ga 1‑c N-layer, the second superlattice layer includes In z Ga 1‑z The N-layer and the fourth GaN layer have the following parameters: y > x > α, y > z, a ≥ b, and the number of periods in the light-emitting layer is ≤ 8. Implementing this invention can improve the luminous efficacy and luminous uniformity of Micro-LEDs at low current densities.

The invention discloses a method for improving hole concentration in a p-type compound semiconductor. Comprising the following steps: in the growth process of a p-type doped compound semiconductor epitaxial layer, co-doping and introducing a certain concentration of compensating impurity elements used for inhibiting intrinsic donor type point defects in a compound semiconductor; after growth of the p-type doped compound semiconductor epitaxial layer is completed, annealing treatment is carried out in a protective atmosphere containing non-metallic elements in the compound semiconductor; wherein the hole concentration of the epitaxial layer is improved through the combined action of the introduction of the compensating impurity element and the annealing treatment. According to the method disclosed by the invention, through a synergistic process of low-atomic-number same-family element doping and nitrogen-containing atmosphere annealing, synchronous improvement of the bulk material and the surface hole concentration is realized.

The invention belongs to the field of power semiconductor devices, and particularly discloses a low-loss IGBT chip with a compensation type floating P region and a preparation method of the low-loss IGBT chip. According to the invention, the N-CS layer is formed in the floating P region, the N-CS layer forms a hole barrier when the device is conducted, the hole concentration of the emitter side is increased by the floating P region, electron injection of the emitter side is enhanced in order to maintain electric neutrality, and the on-state voltage drop can be effectively reduced. In the switching process, the N-CS layer and the floating P region are mutually depleted, the expansion time of a depletion layer is shortened, and the switching time of the device is shortened. The switching loss can be reduced while the low on-state voltage drop of the device is maintained, and the on-state voltage drop and the switching loss are effectively balanced. An N-type layer is introduced into a floating P region, and the original maximum electric field is reduced due to positive charges provided by N-CS, so that the reduction of the electric flux of the traditional floating P region, the reduction of a concentrated high electric field near a groove, the protection of a gate oxide layer at the bottom of the groove and the improvement of the blocking voltage of the device are facilitated.

This invention relates to an npn-type solar-blind ultraviolet detector using Ga2O3 as the light-absorbing layer and its fabrication method. The detector, from bottom to top, comprises a GaN substrate, a CuI hole transport layer, a Ga2O3 solar-blind ultraviolet absorption layer, a Ti electrode layer, and an Au electrode layer. An In electrode layer is disposed on one side of the CuI hole transport layer on the GaN substrate. This invention uses n-GaN, which has high electron mobility, good thermal stability, and a mature fabrication process, as the bottom substrate; p-CuI, with high hole concentration, high mobility, and excellent p-type conductivity, and good energy level matching with n-GaN and subsequent materials, as the hole transport layer; and n-Ga2O3, with an ultrawide bandgap, high chemical stability, and a high absorption coefficient for solar-blind ultraviolet light, as the light-absorbing layer. Combining the low contact resistance of the bottom In electrode with the high contact area of ​​the top Ti / Au interdigitated electrode improves carrier collection efficiency.

The invention discloses a germanium-silicon heterojunction npn type bipolar transistor and a preparation method thereof, and relates to the technical field of semiconductors. According to the germanium-silicon heterojunction npn-type bipolar transistor and the preparation method thereof, the p-type heavily-doped polycrystalline silicon emitter region inner side wall is inserted between the n-type heavily-doped polycrystalline silicon emitter region and the L-shaped silicon oxide inner side wall, so that the hole accumulation state of a p-type connecting base region below the L-shaped silicon oxide inner side wall and adjacent to the L-shaped silicon oxide inner side wall can be caused or enhanced; and therefore, the hole concentration of the corresponding region can be increased, and the parasitic resistance of the corresponding connecting base region can be effectively reduced. The parasitic resistance of the connecting base region is reduced, so that the resistance of the parasitic base region of the germanium-silicon heterojunction npn type bipolar transistor can be reduced, the fmax can be improved under the condition of given fT, and the radio frequency noise coefficient can be effectively reduced; finally, the purpose of improving comprehensive device performance such as radio frequency power and noise of the germanium-silicon heterojunction npn type bipolar transistor serving as a radio frequency device is achieved.

The invention relates to the technical field of semiconductor material preparation, in particular to a preparation method of a p-type beta-Ga2O3 single crystal thin film, which utilizes pulsed laser deposition to prepare a gallium oxide thin film in a high oxygen pressure atmosphere, realizes great reduction of oxygen vacancy defect concentration in gallium oxide, reduces n-type carrier concentration increase caused by oxygen vacancy, and improves the yield of the gallium oxide thin film. The method has the advantages that the gallium oxide is doped with the nitrogen element, so that the p-type doping is difficult, the nitrogen element is guided to replace oxygen ions in gallium oxide crystal lattices under the action of the annealing atmosphere, the p-type conductive characteristic is formed, the hole concentration of the gallium oxide thin film is improved, and finally the high-quality beta-Ga2O3 thin film which is controllable in size and thickness and has p-type conductivity is obtained. By controlling the annealing time, the hole mobility of the thin film can reach up to 18 cm / V.s, and the hole concentration can reach up to 5.0 * 10 < 16 > / cm. The method is simple in process, low in manufacturing cost and suitable for industrial large-scale production, and important technical support is provided for research and development of high-performance power devices and deep ultraviolet detectors.

The invention discloses a composite negative electrode material, a preparation method thereof and a lithium ion battery, and belongs to the technical field of batteries, the composite negative electrode material comprises a core body and a shell wrapping the core body, the core body comprises Fe-B co-doped Si with Si-Fe alloy attached to the surface, and the shell comprises an amorphous carbon layer with SiC growing on the surface. According to the composite negative electrode material, Fe-B is co-doped with Si to form a core body, and B doping can increase the hole concentration so as to improve the carrier mobility, so that the electron and ion transfer rate of silicon is improved, and the intrinsic conductivity and multiplying power of silicon are improved; meanwhile, the Si-Fe alloy phase, the amorphous carbon layer and SiC growing on the surface of the amorphous carbon layer are matched with one another, so that volume expansion of silicon during charging and discharging can be effectively inhibited, and a transmission channel for lithium ions is provided, so that the cycle performance and the rate capability of a lithium ion battery prepared from the silicon-based composite negative electrode material are improved.

The application discloses a GaN-based light-emitting diode epitaxial wafer and a preparation method thereof and a GaN-based light-emitting diode, and relates to the field of semiconductor photoelectric devices. The GaN-based light-emitting diode epitaxial wafer comprises a substrate and a nucleation layer, an intrinsic GaN layer, an N-type semiconductor layer, a multi-quantum well layer, an electron blocking layer and a P-type semiconductor layer arranged on the substrate in sequence; and the P-type semiconductor layer is a C / O co-doped P-type GaN thin film layer. By implementing the application, the brightness of the light-emitting diode can be improved, the anti-static capacity can be improved, and the surface roughness can be reduced.