DMOS transistor containing field plate and manufacturing method thereof

Abstract

According to the DMOS transistor containing the field plate and the manufacturing method of the DMOS transistor containing the field plate, a U-shaped field plate is additionally arranged between a gate electrode and a source region, a field plate electrode is formed by depositing metal, the potential of the field plate electrode is adjusted, and it is avoided that under large voltage, carriers enter the gate electrode in a tunneling mode through oxide layer quality defects, and consequently gate source conduction is caused. And meanwhile, the U-shaped field plate structure can also increase the electric field distribution length, so that the effects of reducing the peak electric field intensity and dispersing the peak electric field of the device are achieved, the breakdown voltage of the DMOS device is further improved, and the on-resistance is further reduced.

Description

technical field [0001] The invention relates to a semiconductor device and a manufacturing method, in particular to a DMOS device and a manufacturing method thereof. Background technique [0002] With the continuous development of the semiconductor industry, high performance and miniaturization have become the development trend of electronic systems. Among them, the two key parameters of power MOSFET (Metal Oxide Semiconductor Field-Effect Transistor) are breakdown voltage and on-resistance. Since the MOSFET device is a single-stage device, its breakdown voltage is related to the thickness of the drift region and the doping concentration of the drift region. A high breakdown voltage requires a thick drift region and a low doping concentration of the drift region, which will make it turn on resistance increases. Therefore, as the withstand voltage of the device increases, the on-resistance increases exponentially, and the power consumption increases greatly. In particular,...

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Problems solved by technology

[0003] In the DMOS device design process, the breakdown voltage and on-resistance of the device are very important parameters. During the conduction process of the prior art device, when the carriers flow from the metallized source to the metallized drain, when the When the gate electrode voltage continues to increase to a certain value, the carriers will tunnel into the gate through the quality defects of the oxide layer, resulting in gate-source conduction and reducing the performance of the device.

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