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Formation method of semiconductor structure

A semiconductor and gate structure technology, applied in the field of semiconductor structure formation, can solve problems such as affecting the short-channel effect and affecting the transistor channel mobility, and achieve the effect of suppressing the short-channel effect and improving the stability

Pending Publication Date: 2022-07-01
SMIC INT NEW TECH DEV SHANGHAI CO LTD
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  • Description
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  • Application Information

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Problems solved by technology

At the same time, the diffusion of boron and phosphorus dopant ions caused by transient enhanced diffusion (TED) not only affects the short channel effect, but also affects the transistor channel mobility, junction capacitance, and leakage performance.

Method used

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  • Formation method of semiconductor structure
  • Formation method of semiconductor structure

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Embodiment Construction

[0029] It should be noted that "surface" and "upper" in this specification are used to describe the relative positional relationship in space, and are not limited to whether they are in direct contact.

[0030] As described in the background art, the performance of the semiconductor structure formed by the existing FinFET technology needs to be improved. Now combined with a semiconductor structure to illustrate the analysis.

[0031] Figure 1 to Figure 3 It is a cross-sectional schematic diagram of the formation process of a semiconductor structure.

[0032] Please refer to figure 1 and figure 2 , figure 1 is a top view, figure 2 Yes figure 1 A schematic diagram of a cross-sectional structure along the XY direction, a substrate is provided, the substrate includes a base 100 , fins 101 and isolation structures 102 located on the base 100 , and the isolation structures 102 are also located on the sidewalls of the fins 101 , and the top surface of the isolation struct...

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Abstract

The invention discloses a method for forming a semiconductor structure. The method comprises the following steps of: forming source and drain layers in fin parts on two sides of a gate structure; forming a first side wall on the side wall of the gate structure, wherein the first side wall is also located on the side wall and the top surface of a part of the source-drain layer; a first protection layer and a mask layer located on the first protection layer are formed on the surface of the source-drain layer on the first region, and first doping ions are arranged in the first protection layer so that the first doping ions can be doped into the top surface of the source-drain layer on the first region; and injecting second doping ions into the top surface of the source drain layer on the second region by taking the mask layer as a mask. The first side wall can prevent the first doped ions or the second doped ions from entering the channel from the position where the grid electrode structure and the source drain layer are not tightly combined, the influence of the first doped ions or the second doped ions on the concentration of the doped ions in the channel is avoided, and the performance of the formed device is improved.

Description

technical field [0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular, to a method for forming a semiconductor structure. Background technique [0002] In the existing semiconductor field, the fin field effect transistor (FinFET) is an emerging multi-gate device. Compared with the planar metal-oxide semiconductor field effect transistor (MOSFET), the fin field effect transistor has more It has strong short-channel suppression ability and stronger working current, and has been widely used in various semiconductor devices. [0003] With the continuous development of semiconductor technology, the gate size of fin field effect transistors is also continuously reduced. At this time, the distribution width of boron and phosphorus doping ions becomes an important factor affecting the short channel effect (SCE) of the fin field effect transistor. At the same time, the diffusion of boron and phosphorus doping ions caused by tr...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L21/336H01L29/06
CPCH01L29/7855H01L29/66795H01L29/0603H01L29/0684
Inventor 周飞
Owner SMIC INT NEW TECH DEV SHANGHAI CO LTD
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