Comparator applied to low power supply voltage ADC (Analog to Digital Converter)

Abstract

The invention discloses a comparator applied to a low power supply voltage ADC (Analog to Digital Converter). The comparator comprises first to twenty-third MOS (Metal Oxide Semiconductor) transistors. The dynamic amplifier is of a two-stage structure, the first stage is a dynamic pre-amplifier composed of first to eighth MOS transistors and a twenty-third MOS transistor, and the integral time is controlled through a seventh MOS transistor and the eighth MOS transistor so as to adjust the gain of the dynamic amplifier; and in a reset state, a path of small normally-on current is formed through the fourth MOS tube to adjust a first-stage common-mode level during reset so as to reduce the common-mode establishment time during amplification. The second stage is composed of a ninth MOS transistor to a twenty-second MOS transistor, in the amplification stage of the second stage, the nineteenth MOS transistor is conducted, and the nineteenth MOS transistor, the seventeenth MOS transistor, the fifteenth MOS transistor and the eleventh MOS transistor form another positive feedback loop, so that more differential voltage is accumulated by Vx- / Vx +, it is guaranteed that the source electrodes of the thirteenth MOS transistor and the fourteenth MOS transistor are clamped by the seventeenth MOS transistor and the eighteenth MOS transistor to be close to VDD, and therefore the output voltage is increased. And the thirteenth / fourteenth MOS tube works in the saturation region for a longer time, so that the gain of the second stage in the amplification stage is increased.

Description

technical field [0001] The present invention relates to the field of ADC (analog-to-digital converter), in particular to a comparator applied to a low power supply voltage ADC. Background technique [0002] As the demand for speed improvement in applications in the communication field continues to increase, the sampling speed of ADC (analog-to-digital converter) continues to increase. As an important part of the ADC, the comparator often becomes the speed bottleneck of the ADC. With the evolution of semiconductor technology, although the overall device is developing in the direction of speed improvement, the low voltage of advanced technology has become a design difficulty in circuit design, especially the comparator in ADC needs to work at high speed under low power supply voltage, which is difficult for traditional circuits. meet demand. [0003] The two most commonly used comparators in ADCs are figure 1 as well as figure 2 shown. figure 1 It is a comparator with a s...

AI Technical Summary

Problems solved by technology

figure 1 It is a comparator with a strongarm (dynamic latch) structure. The comparator has a total of 4 layers of devices from the power supply to the ground, which leads to insufficient power supply voltage margin of the comparator at low power supply voltage, making the comparator slower. When Functional problems may even occur when the threshold voltage of the device is higher

figure 2 It is a traditional Double Tail (double-tailed) comparator. The comparator is composed of two stages. The first stage dynamically amplifies the input signal, and the second stage latches and compares the results of the first stage. Although this structure can meet the requirements of low-voltage Requirements, the source-drain voltage (VDS) of the input signal of the second stage is relatively small during amplification, resulting in a slower speed of the second stage

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