Manufacture of non-volatile memory

Abstract

The manufacture of non-volatile memory includes forming charge trap layer of insulating material and conducting strips as precursor of grid on the substrate; forming embedded bit lines between conducting strips with some interval being maintained between the embedded bit line and the adjacent conducting strips; forming high-dielectric constant interval walls on the side walls of the conducting strips; defining the conducting strips to form grids and finally forming electrically connecting word lines over the substrate. The high-dielectric constant interval walls is of material with sufficienthigh dielectric constant and has enough width, so that the channel formed by the non-volatile memory can extend to below the high-dielectric constant interval walls and form electric connection with the embedded bit lines.

Description

technical field [0001] The present invention relates to a manufacturing method of a semiconductor device, and in particular to a manufacturing method of a non-volatile memory (Non-volatile Memory, NVM). Background technique [0002] Non-volatile memory can still retain the data in it when the power is turned off, and has the advantages of being light, thin, short, and small, so its application is becoming more and more extensive. Early non-volatile memories used polysilicon floating gate (Floating Gate) to store data (charge). Since polysilicon is a conductor, the charge will be dispersed throughout the polysilicon floating gate, so that only one bit of data can be stored in a memory cell. . The most recently proposed non-volatile memory is the silicon nitride read-only memory ( N itride ROM , NROM) and SONOS ( S ubstrate- O xide- N itride- O xide- S Silicon) memory and the like, a non-volatile memory that uses a silicon nitride layer as a charge storage layer. Sinc...

AI Technical Summary

Problems solved by technology

[0005] Although in the above known technology, the data storage areas 170 and 180 can be programmed or erased respectively, the charge stored in the data storage area 170 (180) will interfere with the data storage area 180 (170), affect its normal operation

Furthermore, when the device size (gate line width) is reduced, the distance between the two data storage regions 170 and 180 is also reduced, which makes the interference phenomenon more serious, so the reduction of the device is difficult to achieve

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