Semiconductor device capable of preventing moisture-absorption of fuse area thereof and method for manufacturing the fuse area

Abstract

A fuse area of a semiconductor device capable of preventing moisture-absorption and a method for manufacturing the fuse area are provided. When forming a guard ring for preventing permeation of moisture through the sidewall of an exposed fuse opening portion, an etch stop layer is formed over a fuse line. A guard ring opening portion is formed using the etch stop layer. The guard ring opening portion is filled with a material for forming the uppermost wiring of multi-level interconnect wirings or the material of a passivation layer, thereby forming the guard ring concurrently with the uppermost interconnect wiring or the passivation layer. Accordingly, permeation of moisture through an interlayer insulating layer or the interface between interlayer insulating layers around the fuse opening portion can be efficiently prevented by a simple process. In addition, the etch stop layer is also formed under the fuse opening portion so that an insulating layer remaining on the fuse line can be controlled to have a predetermined thickness when forming the fuse opening portion, thereby improving the cutting efficiency of fuses.

Description

[0001] This application is a Divisional of U.S. Ser. No. 10 / 334,745, filed on Dec. 31, 2002, now pending, which is a divisional of U.S. patent application Ser. No. 09 / 650,967, filed on Aug. 29, 2000, now issued U.S. Pat. No. 6,525,398, which claims priority from Korean Patent Application No. 1999-36534, filed on Aug. 31, 1999, all of which are hereby incorporated by reference in their entirety.BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, to the structure of a fuse area and a method for forming the fuse area. [0004] 2. Description of the Related Art [0005] Generally, semiconductor devices are formed by stacking material layers of various patterns and finally depositing a protection film called a passivation film. The passivation film, conventionally formed of a hard film such as a silicon nitride film, protects semiconductor devices, especiall...

AI Technical Summary

Benefits of technology

The present invention provides a semiconductor device with a better protected fuse area that allows for efficient cutting of fuses. This is achieved by using a guard ring and an etch stop layer to prevent moisture-permeation and absorb the etching process. A multi-layer interlayer insulating layer structure is formed on a substrate including the etch stop layer, and a passivation layer is formed on the substrate to expose the fuse opening portion. A moisture barrier layer can also be added. The etch stop layer is formed over the fuse line and at least in a region in which the guard ring is formed. The method includes etching the multi-layer interlayer insulating layer structure until part of the etch stop layer is exposed to form the guard ring opening portion. The guard ring is formed by filling the guard ring opening portion with a predetermined material. The etch stop layer can be separately formed for the guard ring opening portion and the fuse opening portion. The method also includes using the etch stop layer as an etch stop layer for forming the guard ring opening portion and the fuse opening portion, which helps to minimize an increase in the layout area. The etch stop layer helps to accurately control the thickness of an interlayer insulating film remaining on the fuse line, which improves the cutting efficiency of the fuse.

Problems solved by technology

However, films containing a large amount of impurity, such as the above described BPSG film, PSG film, SOG film and TEOS film, in which boron (B) exceeds 5 weight percent and phosphorous (P) exceeds 4 weight percent, cannot withstand much moisture.

As a result, metal interconnects, for example, the interconnect wirings 38 and 42 formed of aluminum, corrode, thereby degrading the reliability of semiconductor devices.

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