Plasma immersion ion implantation apparatus

Abstract

A plasma reactor for performing plasma immersion ion implantation, dopant deposition or surface material enhancement, includes a vacuum chamber, a wafer support pedestal or electrostatic chuck having an insulated electrode underlying a wafer support surface within said chamber, a chucking voltage source coupled to the insulated electrode, a thermal sink coupled to the electrostatic chuck, an RF bias power generator coupled to said electrostatic chuck, and a process gas supply and gas inlet ports coupled to the chamber and coupled to the gas supply. The process gas supply contains either (a) a gas containing a dopant species to be ion implanted in a semiconductive material of workpiece, (b) a gas containing a dopant species to be deposited on a surface of a semiconductive material of a workpiece, or (c) a gas containing a material enhancement species to be ion implanted into a workpiece.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This application is a continuation-in-part of U.S. application Ser. No. 10 / 929,104, filed Aug. 26, 2004 entitled GASLESS HIGH VOLTAGE HIGH CONTACT FORCE WAFER CONTACT-COOLING ELECTROSTATIC CHUCK by Douglas A. Buchberger, Jr., et al. This application is also a continuation-in-part of U.S. application Ser. No. 10 / 838,052, filed May 3, 2004 entitled LOW TEMPERATURE CVD PROCESS WITH CONFORMALITY, STRESS AND COMPOSITION by Hiroji Hanawa, et al., which is a continuation-in-part of U.S. application Ser. No. 10 / 786,410, filed Feb. 24, 2004 entitled FABRICATION OF SILICON-ON-INSULATOR STRUCTURE USING PLASMA IMMERSION ION IMPLANTATION by Dan Maydan, et al., which is a continuation-in-part of U.S. application Ser. No. 10 / 646,533, filed Aug. 22, 2003 entitled PLASMA IMMERSION ION IMPLANTATION PROCESS USING A PLASMA SOURCE HAVING LOW DISSOCIATION AND LOW MINIMUM PLASMA VOLTAGE, which is a continuation-in-part of U.S. application Ser. No. 10 / 164,327,...

AI Technical Summary

Benefits of technology

[0009] The wafer support can be a high contact force electrostatic chuck having a flat polished workpiece contact surface, in which case a workpiece temperature controller governs a wafer clamping voltage of the electrostatic chuck. The bias source can be on

Problems solved by technology

Such a cleaning process can be carried out very rapidly using a plasma process, but this can leave the wafer surface very rough, leading to inferior results.

For example, a rough surface that is ion implanted with a dopant material can have an excessive sheet resistance.

Deposition of an epitaxial layer (by a plasma enhanced chemical vapor deposition process, for example) on a rough surface can result in a low quality deposited layer that is less crystalline and more amorphous.

This approach leaves the smoothest wafer surface but can be unacceptably slow, and in many cases should be carried out at a sufficiently high temperature to activate the gas species.

Such a high temperature can exceed the wafer process thermal budget.

The problem is that the external feed from the RPS chamber to the main chamber holding the wafer does not provide a uniform distribution of the neutrals or radicals over the wafer surface, so that the wafer cannot be cleaned uniformly.

Typically, the radicals or neutrals from the RPS chamber are fed to a side port of the main chamber, leading to the non-uniformity.

Unfortunately, plasma cleaning process are so fast that they tend to consume a relatively large fraction of the chamber surfaces and elements (such as process kits), and therefore are extremely costly insofar as they require frequent replacement of chamber interior parts and materials.

The minimum consumption of chamber interior elements for a thorough cleaning is obtained using cleaning gases without a plasma, but this approach is too time-consuming.

The problem with this approach is that d

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