Method of Screening Static Random Access Memory Cells for Positive Bias Temperature Instability

a random access memory and temperature instability technology, applied in static storage, information storage, digital storage, etc., can solve the problems of increasing the probability of read and write functional failure, physical scaling of device size raises significant issues, and increases the variability of electrical characteristics, so as to improve the screen conditions

US20130058177A1Active Publication Date: 2013-03-07TEXAS INSTR INC
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Patent Information

Authority / Receiving Office
US · United States
Patent Type
Applications(United States)
Current Assignee / Owner
Publication Date
2013-03-07

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Abstract

A method of screening complementary metal-oxide-semiconductor CMOS integrated circuits, such as integrated circuits including CMOS static random access memory (SRAM) cells, for n-channel transistors susceptible to transistor characteristic shifts over operating time. For the example of SRAM cells formed of cross-coupled CMOS inverters, static noise margin and writeability (Vtrip) screens are provided. Each of the n-channel transistors in the CMOS SRAM cells are formed within p-wells that are isolated from p-type semiconductor material in peripheral circuitry of the memory and other functions in the integrated circuit. Forward and reverse body node bias voltages are applied to the isolated p-wells of the SRAM cells under test to determine whether such operations as read disturb, or write cycles, disrupt the cells under such bias. Cells that are vulnerable to threshold voltage shift over time can thus be identified.
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Description

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority, under 35 U.S.C. §119(e), of Provisional Application No. 61 / 530,131, filed Sep. 1, 2011, which is incorporated herein by this reference.STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT

[0002] Not applicable.BACKGROUND OF THE INVENTION

[0003] This invention is in the field of solid-state memory. Embodiments of this invention are more specifically directed to the manufacture and testing of static random access memories (SRAMs).

[0004] Many modern electronic devices and systems now include substantial computational capability for controlling and managing a wide range of functions and useful applications. Considering the large amount of digital data often involved in performing the complex functions of these modern devices, significant solid-state memory capacity is now commonly implemented in the electronic circuitry for these systems. Static random access memory (SRAM) has become the memory technolo...

Examples

Embodiment Construction

[0043]This invention will be described in connection with certain embodiments, namely as implemented into a method of testing static random access memories, because it is contemplated that this invention will be especially beneficial when used in such an application. However, it is also contemplated that embodiments of this invention will also be beneficial if applied to memories of other types, including read-only memories and electrically programmable read-only memories, among others. Furthermore, it is contemplated that embodiments of this invention may be used to test and screen circuit functions other than memories, including especially digital logic functions. Accordingly, it is to be understood that the following description is provided by way of example only, and is not intended to limit the true scope of this invention as claimed.

[0044]FIG. 2 illustrates an example of large-scale integrated circuit 10, in the form of a so-called “system-on-a-chip” (“SoC”), as now popular in...