Fluorine Passivation in CMOS Image Sensors

Abstract

CMOS imaging sensors having fluorine-passivated structures to reduce dark current are disclosed together with methods of making thereof. The CIS comprises an array of pixels on a substrate, each pixel comprising a pinned photodiode, an isolation trench adjacent to the pinned photodiode, and a plurality of transistors. Methods of preparing a CIS comprise providing a source of fluorine (F) atoms, and annealing in the presence of the source of F atoms. After the annealing, at least one silicon-containing surface or region in the CIS comprises Si—F bonds and is fluorine passivated.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]This application claims priority from U.S. Provisional Patent Application No. 61 / 779,740, filed on Mar. 13, 2013, which is incorporated by reference herein in its entirety for all purposes.FIELD OF THE INVENTION[0002]One or more embodiments of the present invention relate to CMOS image sensors and methods of making thereof.BACKGROUND[0003]As the pixel size is scaled for higher image resolution and / or higher density of integration in advanced CMOS image sensor (CIS) technology, dark current reduction is one of the main problems that limits signal to noise ratio (SNR). The dark current comes from several sources, including minority carrier diffusion current in the photodiode, surface recombination centers and / or traps (Nst) at the trench sidewall liner and the top p-layer interfaces in contact with bulk silicon, the transfer gate interfacial SiO2 / Si interface (Dit), and bulk metallic contamination sites (Cu, Mo, Au, etc.) in the silicon with...

AI Technical Summary

Benefits of technology

The present invention offers methods of making a fluorine-passivated CMOS imaging sensor (CIS) and a CIS that includes fluorine atoms in certain regions of the CIS. The fluorine atoms serve to passivate dangling Si atoms in the CIS, reducing dark current. The methods involve annealing the CIS in the presence of a source of fluorine atoms, such as F2, NF3, or CF4, or depositing a fluorine-containing SiO2 layer or fluorinated silicate glass layer on the CIS. The CIS comprises a pinned photodiode, an isolation trench, and a plurality of transistors, and at least one region of the CIS, such as the pinned photodiode, isolation trench, or transistors, is fluorine-passivated. The technical effects of the present invention are reduced dark current and improved performance of the CIS.

Problems solved by technology

As the pixel size is scaled for higher image resolution and / or higher density of integration in advanced CMOS image sensor (CIS) technology, dark current reduction is one of the main problems that limits signal to noise ratio (SNR).

Hydrogen (H2) passivation is commonly used to reduce the dark current, although the reduction may be insufficient as the pixel size is reduced.

However, the ion implantation process can create additional defects requiring subsequent thermal annealing steps at the high temperature to reduce the additional defects.

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