Fluorine Passivation in CMOS Image Sensors

Abstract

CMOS imaging sensors having fluorine-passivated structures to reduce dark current are disclosed together with methods of making thereof. The CIS comprises an array of pixels on a substrate, each pixel comprising a pinned photodiode, an isolation trench adjacent to the pinned photodiode, and a plurality of transistors. Methods of preparing a CIS comprise providing a source of fluorine (F) atoms, and annealing in the presence of the source of F atoms. After the annealing, at least one silicon-containing surface or region in the CIS comprises Si—F bonds and is fluorine passivated.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]This application claims priority from U.S. Provisional Patent Application No. 61 / 779,740, filed on Mar. 13, 2013, which is incorporated by reference herein in its entirety for all purposes.FIELD OF THE INVENTION[0002]One or more embodiments of the present invention relate to CMOS image sensors and methods of making thereof.BACKGROUND[0003]As the pixel size is scaled for higher image resolution and / or higher density of integration in advanced CMOS image sensor (CIS) technology, dark current reduction is one of the main problems that limits signal to noise ratio (SNR). The dark current comes from several sources, including minority carrier diffusion current in the photodiode, surface recombination centers and / or traps (Nst) at the trench sidewall liner and the top p-layer interfaces in contact with bulk silicon, the transfer gate interfacial SiO2 / Si interface (Dit), and bulk metallic contamination sites (Cu, Mo, Au, etc.) in the silicon with...

AI Technical Summary

Benefits of technology

[0016]Embodiments of CMOS imaging sensors include fluorine-passivated CIS made using the methods described above. The CIS comprise a pinned photodiode, an isolation trench, and a plurality of transistors, wherein at least one of the pinned photodiode, isolation trench, or one of the plurality of transistors comprises fluorine. The fluorine can be in the form of Si—F bonds (or Ge—F bonds) to passivate Si containing materials in the CIS; for example, dangling Si— bonds in polycrystalline Si can be passivated using F atoms, and dangling Si— bonds in SiO2 or silicate glass can be passivated using F atoms. In particular, dangling Si— bonds present at or near Si—SiO2 interfaces or in the space charge region of the pinned photodiode can be passivated in order to reduce dark current in the CIS. In some embodiments, the fluorine passivates a space charge region in the pinned photodiode. In some embodiments, the fluorine passivates a surface of the pinned photodiode. In some embodiments, the fluorine passivates a layer on the sidewall of the isolation trench. In some embodiments, the fluorine passivates an interfacial layer of at least one of the plurality of transistors. In some embodiments, the interfacial layer is adjacent to a gate dielectric.

Problems solved by technology

As the pixel size is scaled for higher image resolution and / or higher density of integration in advanced CMOS image sensor (CIS) technology, dark current reduction is one of the main problems that limits signal to noise ratio (SNR).

Hydrogen (H2) passivation is commonly used to reduce the dark current, although the reduction may be insufficient as the pixel size is reduced.

However, the ion implantation process can create additional defects requiring subsequent thermal annealing steps at the high temperature to reduce the additional defects.

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